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Floating Point Unit. Floating Point Unit ( FPU ). There are eight registers, namely ST(0), ST(1), ST(2), …, ST(7). They are maintained as a stack. . Floating Point Unit ( FPU ). The top element of the stack is always named as ST(0). For example, .data v1 REAL8 1.23 v2 REAL8 6.3
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Floating Point Unit ( FPU ) • There are eight registers, namely ST(0), ST(1), ST(2), …, ST(7). • They are maintained as a stack.
Floating Point Unit ( FPU ) The top element of the stack is always named as ST(0). For example, .data v1 REAL8 1.23 v2 REAL8 6.3 v3 REAL8 7.9 • .code • finit • fld v1 • fld v2 • fld v3 • finitfinitfinitfinit • fld v1 fld v1fld v1fld v1 • fld v2 fld v2 fld v2fld v2 • fld v3 fld v3 fld v3 fld v3 ST(0) 7.9 ST(0) 1.23 6.3 ST(0) 6.3 ST(1) 1.23 ST(1) 1.23 ST(2)
.code movedi, 0 finit fld ONE fst v[edi] movecx, num dececx cmpecx, 0 ;signed jleLdone L1: finit fld ONE fld v[edi] fadd ST(0), ST(1) add edi, 8 fst v[edi] loop L1 Ldone: Generate a series: 1, 2, 3, 4, …, (1) Sn+1 = Sn + 1 (2) S1 = 1 Store the elements in an array. We need to initialize the first element and then apply (1). .data v REAL8 100 DUP(?) ONE REAL8 1.0 num DWORD 10
Generate Fibonacci series (numbers) (1) Sn+2 = Sn+1 + Sn (2) S0 = 1, S1 = 1 (seed values) Generate the first m numbers.
.code movedi, 2*8 movesi, 0 movecx, m sub ecx, 2 cmpecx, 0 jleLdone ;signed L1: finit fld S[esi] fld S[esi+8] fadd ST(0), ST(1) fst S[edi] add edi, 8 add esi, 8 loop L1 Ldone: Generate Fibonacci series (numbers) (1) Sn+2 = Sn+1 + Sn (2) S0 = 0, S1 = 1 (seed values) Generate the first m numbers. .code S REAL8 0.0, 1.0, 100 DUP(?) m DWORD 10
Conditional jumps • cmpeax, a • ja L1 ; eax> a ; unsigned comparison • jb L1 ; eax < a • jae L1 ; eax >= a • je L1 ; eax == a • jl, jg ; signed comparison