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CSE 140L Lecture 6 Interface and State Assignment

Learn about state assignment, debouncers, synchronizers, and metastability in digital systems. Understand how to handle asynchronous inputs effectively to ensure system reliability.

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CSE 140L Lecture 6 Interface and State Assignment

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  1. CSE 140L Lecture 6Interface and State Assignment Professor CK Cheng CSE Dept. UC San Diego

  2. Interface: Quality of Input Signal • Debouncers • Double-Throw Switch • Single-Throw Switch • Synchronizers • Metastability • Synchronization

  3. Debouncers: Double-Throw Switch SR debouncer

  4. Debouncers: Single-Throw Switch Pull down Vcap/Vinitial = e –t/RC R2C= -T/ln(Vth/Vdd) Push up Vcap/Vfinal= 1-e-t/RC (R1+R2)C= -T/ln(1-Vth/Vdd) Bounce time < T=20msec

  5. Synchronizer: Input may occur any time • Asynchronous (for example, user) inputs might violate the dynamic discipline

  6. Synchronizer: Metastability • Metastability: A synchronizer failure that the voltage falls between 0 and 1.

  7. Metastability • Any bistable device has two stable states and a metastable state between them • A flip-flop has two stable states (1 and 0) and one metastable state • If a flip-flop lands in the metastable state, it could stay there for an undetermined amount of time

  8. Flip-flop Internals • Because the flip-flop has feedback, if Q is somewhere between 1 and 0, the cross-coupled gates will eventually drive the output to either rail (1 or 0, depending on which one it is closer to). • A signal is considered metastable if it hasn’t resolved to 1 or 0 • If a flip-flop input changes at a random time, the probability that the output Q is metastable after waiting some time, t, is: • P(tres > t) = (T0/Tc ) e-t/τ • tres : time to resolve to 1 or 0 • T0, τ : properties of the circuit

  9. Metastability • Intuitively: • T0/Tc describes the probability that the input changes at a bad time, i.e., during the aperture time • P(tres > t) = (T0/Tc ) e-t/τ • τ is a time constant indicating how fast the flip-flop moves away from the metastable state; it is related to the delay through the cross-coupled gates in the flip-flop • P(tres > t) = (T0/Tc ) e-t/τ • In short, if a flip-flop samples a metastable input, if you wait long enough (t), the output will have resolved to 1 or 0 with high probability.

  10. Synchronizers • Asynchronous inputs (D) are inevitable (user interfaces, systems with different clocks interacting, etc.). • The goal of a synchronizer is to make the probability of failure (the output Q still being metastable) low. • A synchronizer cannot make the probability of failure 0.

  11. Synchronizer Internals • A synchronizer can be built with two back-to-back flip-flops. • Suppose the input D is transitioning when it is sampled by flip-flop 1, F1. • The amount of time the internal signal D2 can resolve to a 1 or 0 is (Tc - tsetup).

  12. Synchronizer: Shifter Allocate one clock cycle for logic to settle at 0 or 1. For each sample, the probability of failure of this synchronizer is: P(failure) = (T0/Tc ) e-(Tc - tsetup)/τ

  13. Synchronizer Mean Time Before Failure • If the asynchronous input changes once per second, the probability of failure per second of the synchronizer is simply P(failure). • In general, if the input changes N times per second, the probability of failure per second of the synchronizer is: • P(failure)/second = (NT0/Tc) e-(Tc - tsetup)/τ • Thus, the synchronizer fails, on average, 1/[P(failure)/second] • This is called the mean time between failures, MTBF: • MTBF = 1/[P(failure)/second] = (Tc/NT0) e(Tc - tsetup)/τ

  14. Example Synchronizer • Suppose: Tc = 1/500 MHz = 2 ns τ = 200 ps • T0 = 150 ps tsetup = 100 ps • N = 1 events per second • What is the probability of failure? MTBF? • P(failure) = (150 ps/2 ns) e-(1.9 ns)/200 ps • = 5.6 × 10-6 • P(failure)/second = 10 × (5.6 × 10-6 ) • = 5.6 × 10-5 / second • MTBF = 1/[P(failure)/second] ≈ 5 hours

  15. State Assignment • Binary Code: log2n flip-flops for n states • Gray Code: log2n flip-flops for n states • Johnson Code: n/2 flip-flops for n states • “Don’t Care” State Encoding • One Hot Code: n flip-flops for n states

  16. “Don’t Care” State Encoding • State i  Qj= 0 for all j > i, Qi= 1 Qj= x for all j < i.

  17. State Assignment: One Hot Code • For n states, we use n flip-flops. • Each state corresponds to a flip-flop. • Qi= 1 iff present state = state i. Thus, one and only one flip-flop contains a “1”. • We use OR gate to collect input edges. • We use Mux gate to distribute the output edges.

  18. State Assignment: One Hot 0 0 s0s 1 1 S2 S0 S1 0 1

  19. 3. Transformation from Mealy to Moore Machine Moore Machine: y(t) = f(x(t), s(t)) Mealy Machine: y(t) = f(s(t)) s(t+1) = g(x(t), s(t)) x(t) x(t) C1 C2 y(t) C1 C2 y(t) CLK CLK s(t) s(t) Moore Machine Mealy Machine

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