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Seongjoo Lee

Circuit Design Towerjazz 0.18um CMOS Process ( 17. Jul.2014). Seongjoo Lee. < Outline >. 1. Circuit Design 2. Next plan. 1 . Circuit Design. 1 .1 Current splitter. 92.94μm. 4-way split current. 104.03μm. 1 . Circuit Design. 1 .1 Current splitter. Current saturation range.

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Seongjoo Lee

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  1. Circuit Design Towerjazz 0.18um CMOS Process (17.Jul.2014) Seongjoo Lee

  2. < Outline > 1. Circuit Design2. Next plan

  3. 1. Circuit Design 1.1 Current splitter 92.94μm 4-way split current 104.03μm

  4. 1. Circuit Design 1.1 Current splitter Current saturation range Linear current(∵Saturation) MOSFET Transconductance Strong Inversion Target

  5. 1. Circuit Design 1.1 Current splitter Current saturation range • Current Mirror • MOSFET Saturation region => stable current(DC current) • MOSFET Strong Inversion => Smaller Transconductance than Weak Inversion • (Comparably Noise ↓) Linear current(∵Saturation) MOSFET Transconductance Strong Inversion Target

  6. 1. Circuit Design 1.2 DAC Reference Voltage Generator 92.06μm 74.68μm Reference voltage Generator

  7. 1. Circuit Design 1.2 DAC Reference Voltage Generator Current saturation range Linear current(∵Saturation) MOSFET Transconductance Strong Inversion Target

  8. 1. Circuit Design 1.3 4-b DAC(Digital-to-Analog Converter) 88.51μm 16 state current control circuit 35μm

  9. 1. Circuit Design 1.3 4-b DAC(Digital-to-Analog Converter) Linear current(∵Saturation) MOSFET Transconductance Current saturation range Strong Inversion Target

  10. 1. Current Mirror Design 1.4 Current Divider

  11. 1. Current Mirror Design 1.4 Current Divider Linear current(∵Saturation) MOSFET Transconductance Current saturation range Strong Inversion Target

  12. 2. Next Plan • I am going to exercise Current Mirror Design. • I will design DAC in chip.

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