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Hamming Code

Hamming Code. Clarissa David Timmy Lau WingChing Lin Jonathan Lee Advisor: Dr. David Parent December 5, 2005. Agenda. Abstract Introduction Why a Hamming Code? Potential Applications Theory of Operation Calculations Cadence Details Summary of Results Cost Analysis Conclusions.

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Hamming Code

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  1. Hamming Code Clarissa David Timmy Lau WingChing Lin Jonathan Lee Advisor: Dr. David Parent December 5, 2005

  2. Agenda • Abstract • Introduction • Why a Hamming Code? • Potential Applications • Theory of Operation • Calculations • Cadence Details • Summary of Results • Cost Analysis • Conclusions

  3. Abstract • Target Specification • Clock Frequency: 250MHz • Load Capacitance: 30fF • Area: 250 x 150 microns • Power Density: 3.5mW • Actual Specification • Clock Frequency: 330MHz • Load Capacitance: 30fF • Area: 1026.31 x 897.12 microns • Power Density: 3.87mW

  4. Introduction • Hamming Code • Detects single and double-bit errors • Application • Telecommunication • Theory • Using 4 data bits, can generate 3 correction bits giving a total of 7 bits • Can correct any single bit error

  5. Longest Path

  6. Schematic Note: This is an Error Generator Gate Level Schematic of Hamming Code

  7. Schematic

  8. Layout

  9. Verification: DRC

  10. Simulation NCVerilog of Hamming Code Logic

  11. Simulation

  12. Cost Analysis But from us….. FREE!!!!!

  13. Lessons Learned • EXPOSE YOURSELF TO THE PROJECT EARLY • Be organized about your routing • Debugging layout • Work together as a team • EXPOSE YOURSELF TO THE PROJECT EARLY !!!

  14. Summary Complete Circuit • Clock Frequency: 330MHz • Area: 1026.31 x 897.12 microns • Power: 3.87mW • Load Capacitance: 30fF

  15. Acknowledgements • Thanks to Cadence Design Systems • Thanks to Professor David Parent • Thanks to the current and past students of EE166

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