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Configuration/Program Method for Altera Device

Configuration/Program Method for Altera Device. Configure FLEX device by Micro-processor 8031 (use the TTF file). Configure the FLEX Device. You can use any Micro-Controller to configure the FLEX device the main idea is clocking in ONE BIT of configuration data per CLOCK

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Configuration/Program Method for Altera Device

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  1. Configuration/Program Methodfor Altera Device

  2. Configure FLEX device by Micro-processor 8031(use the TTF file)

  3. Configure the FLEX Device • You can use any Micro-Controller to configure the FLEX device • the main idea is clocking in ONE BIT of configuration data per CLOCK • start from the BIT 0 • The total Configuration time • e.g. 10K10 need 15K byte configuration file • calculation equation • 10K10 * 1.5 = 15Kbyte • configuration time for the file itself • 15*1024*8*clock = 122,880Clock • assume the CLOCK is 4MHz • 122,880*1/4Mhz=30.72msec

  4. Total Configuration time • Total Configuration time (10K10) • POR(Power On Reset) + programming bit time + error/status check time + 10 extra clock • POR + 30.72msec + error/status check time + 10 extra clock • 100ms + (error/status check + 10 extra clock) + 30.72msec = 130.72msec + (error/status check + 10 extra clock) = ~150msec 100msec + (error/status check + 10 extra clock) + 30.72msec POR ~ 100msec

  5. How about 10K100 10K100 : (1) 100 * 1.5Kbyte = 150Kbyte = 1200Kbits (2) assume DCLK = 6MHz (3) configuration of the POF file itself = 1200K/4Mhz = 195msec (4) Total configuration time = POR + (3) + error/checking + 10 CLOCKS = 295msec + error/checking + 10 CLOCKS = ~350msec

  6. PS (Passive Serial) Pin Information Four Line Needs

  7. PS (Passive Serial) Mode Pseudo Code

  8. Sample Coding Append the “TTF” file here as the Configuration data base_address equ 0 ; if define 00000h, this program compile ROM image. ; Internal RAM usage start at 20h ; address 20h-2fh are bit addressable area ; address 30h-7fh are byte addressable area ; P1.0 - DCLK (output)("0") ; P1.1 - CONF_DONE (input) ("1") ; P1.2 - nCONFIG (output) ("0") ; P1.3 - nSTATUS (input) ("1") ; P1.4 - DATA0 (output) ("0") ; P1.5 - Done (output) ("0") ; PROGRAM SEGMENT DEFINE org 0h power_up: ljmp start org 30h ; INITIALIZE THE 82c31 INTERNAL REGISTER start: clr psw.4 ; select bank 0 (00-07h) clr psw.3 clr ea ; disable the global interrupt mov sp,#50h ; set up the stack pointer at location #110 mov p1,#0cah reset_10k: setb p1.2 ; reset the FLEX device mov dptr,#config_data config_mode: mov a,#0 movc a,@a+dptr rrc a mov p1.4,c setb P1.0 ; toggle the DCLK clr P1.0 ; write the bit 0 rrc a mov p1.4,c setb P1.0 clr P1.0 ; write the bit 1 rrc a mov p1.4,c setb P1.0 clr P1.0 ; write the bit 2 rrc a mov p1.4,c setb P1.0 clr P1.0 ; write the bit 3 rrc a mov p1.4,c setb P1.0 clr P1.0 ; write the bit 4 rrc a mov p1.4,c setb P1.0 clr P1.0 ; write the bit 5 rrc a mov p1.4,c setb P1.0 clr P1.0 ; write the bit 6 rrc a mov p1.4,c setb P1.0 clr P1.0 ; write the bit 7 inc dptr mov a,p1 anl a,#08h ; check for nSTATUS bit jz start mov a,p1 anl a,#02h ; check for CONFIG_DONE jz config_mode user_mode: setb p1.5 user_clock: setb P1.0 clr P1.0 sjmp user_clock config_data: db 255,255, 98,255, 37, 0,255,255,255,255,255,255

  9. How to combine couple SOF to TTF

  10. Recommendation • How fast is the DCLK can go • in the range of 4 ~ 6 MHz • How much of the DCLK, Data can fan-out • around 4 ~6 devices • if need more, add buffer (74244) for every 4~6 devices

  11. PPA (Passive Parallel Async) Pins

  12. PPA Mode Pseudo Code

  13. Recommendation • Make sure have 20ns setup and 20ns hold time for the CS/nCS before nRS/nWS active • After finish one byte write, monitor the RDY/nBUSY signal before next byte is allowed to write • if RDY/nBUSY is LOW, need to wait until it HIGH • Make sure the “User Supplied Start Up Clock” option has been OFF • under the DEVICE_OPTIONS menu within Max+Plus II

  14. I need 3.3V EPC for the 3.3V Device • Altera having 5V EPF10K device and 3.3V EPF10KA device • But Altera only have one type of EPC1 or EPF1441 device for both 10K and 10KA • Problem is how to control the EPC1 for the 5V or 3.3V device • the POF for 10K devices automatic target to EPC1 5V devices • the POF for the 10KA devices automatic target to EPC1 3.3V devices

  15. Convert the 5 V POF to 3.3V POF This is the 3.3V POF for the same EPC device

  16. Conclusion • You can use your system micro-processor to configure any Altera FLEX device • 8K/10K/6K • You can save the Serial EPROM • DCLK should be in the range of 4~6Mhz • Don’t forget that you also need to have pull up resistors on nSTATUS, CONF_DONE pins • JTAG Port • JTAG Chain for MAX and FLEX devices • also support NON-ALTERA JTAG devices • JAM for Single/Multiple MAX devices only • also support NON-ALTERA JTAG devices

  17. Cont... • PS Port • FLEX Chain for FLEX devices only • can not mix the FLEX devices • FLEX A/E devices I/O accept 5V, 3.3V or 2.5V input signal (Multi-Voltage I/O) • EPC1 is not Multi-Voltage I/O • 5V power supply accept 5V signal input • 3V power supply accept 3.3V signal input

  18. MultiVolt Interface VCCIO User Option:Allows Interfaceto 5.0-, 3.3- &2.5-V Systems VCCINT Based on Process:User Connectsto Power Supply VCCIO VCCINT VCCIO Core GNDIO GNDINT GNDIO

  19. cont... 5V 3.3V EPC1 5V supply to EPC1 if TDO is 5V return signal 3.3V supply to EPC1 if TDO is 3.3V return signal Only 6K, 10K/A/E in this chain (8K does not allowed in this chain)

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