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Line Coding Sending Digital Data with Digital Signals. Based on Chapter 5 of William Stallings, Data and Computer Communication. Kevin Bolding Electrical Engineering Seattle Pacific University. Ideal. Source: Stallings, Fig. 3.7. Actual. Pulse Trains.
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Line CodingSending Digital Data with Digital Signals Based on Chapter 5 of William Stallings, Data and Computer Communication Kevin BoldingElectrical EngineeringSeattle Pacific University
Ideal Source: Stallings, Fig. 3.7 Actual Pulse Trains • Pulse Trains are sequences of discrete voltage pulses • Discrete - Takes on one of a finite number of voltages levels • Pulses - Ideally, square pulses with zero rise/fall time • Limited by finite bandwidth of medium • Approximated by a number of superimposed sine waves Each pulse takes the entire available bandwidth ofthe transmission medium Pulse Trains cannot (normally) be combined in the same medium
Goals: Efficient bps maximized for given SNR and bandwidth Line Coding – Sending Data using Pulse Trains • Reality: • Tradeoff efficiency for other goals • Requires either: • Extra signal events • Extra levels in signal • No DC component • Signal never stuck at a constant voltage • Self-clocking • Can recover clocking information from the data stream • Requires regular transitions in signal • Similar to No DC Component • Error detection/recovery • Correct data in the presence of errors • Requires extra data • Subject of another discussion
NRZ Low or Neg Voltage --> binary ‘1’ High or Pos Voltage --> binary ‘0’ Multiple 0’s or 1’s in a row result in DC voltage 0 1 0 1 1 1 0 1 0 0 0 1 0 1 0 1 0 1 1 1 0 1 0 0 0 1 0 1 Non Return to Zero (NRZ) NRZ is sometimes used with low to mean ‘0’ and high for ‘1’ • NRZI (invert ones) • Transition (HL or LH) means ‘1’ • Differential coding • Easier to detect transitions than levels • Multiple 0’s in a row still result in DC voltage NRZ: Efficient DC component Hard to recover clock
Bipolar AMI (Alternate Mark Inversion) Three levels (-,0,+) Zero Voltage --> binary ‘0’ +/- Voltage --> binary ‘1’ 1’s must alternate polarity 0 1 0 1 1 1 0 1 0 0 0 1 0 1 0 1 0 1 1 1 0 1 0 0 0 1 0 1 Multilevel Codes 1’s alternate, but 0’s still can be flatlined Bit Flip (1-> 0) 0 1 0 1 1 1 0 1 0 0 0 1 0 1 • Takes three levels, but only one bit per signal event • Not as efficient as NRZ (needs 3-4dB higher SNR) Code violation • Errors produce code violations (consecutive 1’s of same polarity) Multilevel codes: Needs 3-4dB higher SNR Errors produce code violations Only DC component is at zero • Pseudoternary • Same thing, just switch 1’s and 0’s
Bipolar AMI still has DC for multiple zeros B-AMI has excess capacity (code violations) Substitute a special code when too many zeros in a row 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 Modified Multilevel Codes Eight Zeros Multiple zeroes - Flatline • B8ZS • If eight zeros in a row occur: • If last ‘1’ was +, then • 000+-0-+ • If last ‘1’ was -, then • 000-+0+- Substituted block Code violations B8ZS: Error detection No sustained DC Decent clock recovery Needs 3dB higher SNR • Forces two code violations, so we know it’s not 00011011 • One code violation might be a regular error, but two is unlikely
Manchester – Works on Transitions Low-to-high --> ‘1’ High-to-low --> ‘0’ Consecutive 1’s or 0’s require a transition between bits Can be tricky to identify which are the meaningful transitions Doubles the bandwidth requirement 0 1 0 1 1 1 0 1 0 0 0 1 Manchester Codes Up to two transitions per bit Manchester codes: No DC component Easy clock recovery Error detection Twice the bandwidth needed
Maximum Major DC No Needs extrabits Maximum(differential) Major DC No Needs extrabits Needs 3-4dBextra SNR DC only at 0V Not for stringsof zeros Bit-flipinvalid code Needs 3-4dBextra SNR No sustained DC Yes, but nottrivial Bit-flipinvalid code Needs 2xbandwidth No DC Yes. >=1 edgeper bit Bit-flipmiss transition Line Coding Summary Efficiency No DC Self-clocking Error detect NRZ NRZI Bipolar AMI B8ZS Manch.