Presentation Transcript

1. DREAM isResearch on Embedded Architecture and Multisensing

   http://dream.univ-bpclermont.fr/ Head: François BERRY CONFIDENTIAL
2. Design Hardware and Software plateforms for Embedded Perception Hardware Software Smart camera, Multisensor, Sensors Network, Embedded systems, Many-core architecture Methods ans tools for Languagefor High-LevelSynthesis (HLS), Codesign, Parallel architecture CONFIDENTIAL
3. Hardware Plateforms 1. Introduction SeeMOS OmniMOS BiSeeMOS PanaMOS
4. Hardware Plateforms Imaging device: APTINA CMOS 1024x1024 Couleur/NB E2V CMOS 2048x2048 Couleur/NB DREAM-CAM Sensor Board: GPS+ Compass + Inertial Memory Board: SRAM 6 x 1MB @ 100MHz Main Board Cylcone III EP3C120 Power Supply Provides 10 voltages (1,2v to 5v) @5 A + JTAG Programer Communication Board: USB2,0, Giga-ethernet CONFIDENTIAL
5. Hardware Plateforms DREAM-CAM Automatic extraction of visualfeatures (Harris and Stephen points and ROI) Standard camera + PC DREAMCAM output CONFIDENTIAL
6. Hardware Plateforms DREAM-CAM CONFIDENTIAL
7. Smart Cameras Private Memories SRAM 1MW SRAM 1MW SRAM 1MW SRAM 1MW SRAM 1MW FPGA Ours Smart cameras are FPGA-based systems and modular. Sensors Communication Imager Inertial sensor GPS CONFIDENTIAL
8. The Caph toolset Graph visualizer : .dot format Reference interpreter : based on the fully formalized semantics tracing, profiling and debugging Compiler : elaboration of a target-independant IR specialized backends (SystemC, VHDL) CONFIDENTIAL
9. 1. Introduction Many-core architecture prototyping Communicating Sequential Process (CSP) Model to design HW et SW Application CubeGEN toolset SOFTWARE From sequential application to Coarse-grain parallelism application based on generic parallel skeletons Split Compute Merge (SCM), FARM PIPE : pipeline of skeletons HARDWARE Homogeneous Network of Communicating Processors (HNCP) based on: Distributed memory many core paradigm Efficient communication system : Soft-core processors Passing Message protocol From FIFO to complex DMA-Router
10. CubeGEN : Hardware side 1. Introduction 3 Bidirectional Links Router Hardware Router Hardware Parametrizable SoftCore Memory Memory Parametrizable SoftCore HW Parametrization: IP SoftCore (MicroBlaze – SecretBlaze, …) IP Communication Link (FIFO or Noc) IP I/O Data Flow Memory Size Number of processors Network of 8 Processors (Hypercubetopology)
11. Staff Hardware Staff: F. BERRY Students: F. Pelissier (thèse 3) – Seamoves M. Birem (thèse 2) – Seamoves E. Olaya (thèse 2) – ANR ARMS Smart camera, Multisensor, Sensors Network, Embedded systems Software Staff : A. LANDRAULT, JP DERUTIN, J. SEROT Students : H. Chenini (thèse 4) – Seamoves M-A. Boussadi(thèse 2) – MESR S. Deleplanque (thèse 3) - Innovapole C. Bourasset (thèse 1) – LabexRecipas S. Ahmed (thèse 5) – B. Pakistanaise Language for High-LevelSynthesis (HLS), Codesign, Many-core* Architecture CONFIDENTIAL
12. Implications European project: (Eureka – Euripides) Seamoves (Sensor Enabling Autonomous Motion By Optimized Visual Environment Sensing) Porteur: F. Berry – 1/10/2009- > 30/09/2013 ANR Project: Safeplatoon(Programme Véhicules Pour Les Transports Terrestres Sûreté Des Convois De Véhicules Autonomes) Porteur: J.P. Derutin – 1/03/2011- > 28/02/2014 Fish Parasite (Call ALIA) (Détection de parasite dans les filets de poisson) Porteur: F. Berry – 1/12/2010- > 30/11/2013 Others: “Action Labex” RECIPAS(Réseau de capteursintelligents pour l’aide à la sécurité) Porteur: F. Berry Equipex: CDD de Thierry TIXIER sur 12 mois CONFIDENTIAL