1 / 8

Logical Effort Tool

Spring 2005 VLSI2. Logical Effort Tool. Minsik Cho. Design objective. Fast calculation Various circuit topologies Easy to modify circuits Reload previous circuits. C++ / Tcl. Use C++, for fast computation Use Tcl, for topology representation Who also is using C++/Tcl together?

hashim-davis
Download Presentation

Logical Effort Tool

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Spring 2005 VLSI2 Logical Effort Tool Minsik Cho

  2. Design objective • Fast calculation • Various circuit topologies • Easy to modify circuits • Reload previous circuits

  3. C++ / Tcl • Use C++, for fast computation • Use Tcl, for topology representation • Who also is using C++/Tcl together? NS2: Network simulator (USC) use Tcl for network topology use C++ for actual simulation Probably DesignCompiler(Synopsys)

  4. Working Environment • Windows 2000 or above/ Linux • Visual C++/g++ • Tcl/TK 8.0 or above installed

  5. Tool Design Library Tcl command User command Tcl command User command User Command Implemented in C++ Variables TCL Command

  6. Commands and Demo STAGE0 STAGE1 STAGE2 mux2 inv nand2 3inv inv inv

  7. Interesting 90nm library • nand2 is faster than inv for high load.

  8. Future Work & QA • More commands • Optimal covering • Logical effort optimization

More Related