1 / 7

Digital Codes

Standard Codes (covered in CEC 220) CCITT-2/ITU ARQ ASCII EBCDIC Gray. Digital Codes. Coding Gain For a given Bit error Rate, Coding Gain is defined as the increase required in C/N such that un-coded data yields the same BER as Coded data. Byte Oriented Block Code m : bits per byte

hateya
Download Presentation

Digital Codes

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. Standard Codes (covered in CEC 220) • CCITT-2/ITU • ARQ • ASCII • EBCDIC • Gray Digital Codes Coding Gain For a given Bit error Rate, Coding Gain is defined as the increase required in C/N such that un-coded data yields the same BER as Coded data.

  2. Byte Oriented Block Code m : bits per byte k : information bytes per block n = 2m - 1 : total bytes per block t : number of byte error corrections possible n – k = 2t : required redundancy bytes r = k/n : code “rate” Reed Solomon Code Properties Example: Determine the block properties of an RS code with m = 6 bits/byte, capable of correcting t = 4 byte errors per block. n = 26 – 1 = 63 bytes/block = 378 bits/block n - k = 2t = 8 bytes = 48 redundancy bits k = n – 2t = 55 data bytes = 330 data bits r = k/n = 55/63 = rate 0.873

  3. Reed Solomon Codes (cont) • A “byte error” is byte containing a single bit error. • Multiple bit errors within a byte cannot be corrected, so RS codes are vulnerable to channel interruptions resulting in “burst errors.” • Bit ordering over several coded blocks are often shuffled at the transmitter in a prescribed way and un-shuffled at the receiver so that burst errors are dispersed over several blocks. This is known as Data Interleaving.

  4. BCH Code Properties Block/Word oriented Code Cyclic (polynomial) Code: encoding/decoding is accomplished using shift registers and Modulo 2 addition (XOR). c number of correctible bits per word n = 2i – 1 total bits per word k > n - ci number of data bit per word Example: Determine the block properties of a BCH code with k = 64 bits/word, capable of correcting c = 4 bit errors per word. n = 2i – 1 < ci +k < 4i + 64 imin = 7 nmin = 127 Note: for i = 7 (n = 127), we could have c = 5 and k = 92

  5. Convolutional Codes 4 Symbol Modulator Encoder (State Machine) + Transmitted Symbols Q0 Q1 Q2 Data D Q D Q D Q + Clock The Viterbi decoder uses the input symbols to construct the most likely sequence of encoder states, and deduces the data sequence therefrom. Received Symbols Viterbi Decoder Data

  6. State Diagram for Example Encoder Data = 1 Data = 0 Q0 y1 y2 Q2 101 00 010 01 Q1 100 11 011 10 State Template Q2Q1Q0 y1y2 110 10 001 11 Data 111 01 000 00

  7. Decoding Example Data = 1 Data = 0 101 00 010 01 100 11 011 10 110 10 001 11 111 01 000 00

More Related