Clock Options and Sleep Modes

1. Clock Options and Sleep Modes

2. Clock Sources Flash Fuse bits can be programmed to choose one of the following Clock sources: 1. External RC Osc. • f = 1/(3RC). C should be at least 22 pF.

3. 2. External Clock: • An external clock source is connected to XTAL1 pin and a stability better than 2% is needed. • Fuse bits CKSEL3..0 = 0000 3. Crystal Osc: • Either a quartz crystal or a ceramic resonator may be used. 4. Calibrated Internal RC-Osc: • nominal values at 5V and 25°C are 1.0 / 2.0 / 4.0 / 8.0 MHz • no external components are needed. • during Reset the RC Oscillator is calibrated to give a frequency within ± 3% of the nominal frequency

4. Using the AVR-Studio, the clock can be selected, accordingly internal fuse settings will be programmed.

5. Clock Distribution • The AVR Clock Control Unit generates and distributes different clock signals to various resources, namely: • clkI/O to General I/O Modules (like Timer/Counters, Communication system and also the External Interrupt module and Asynchronous Timer/Counter. • clkADCto A/D. • clkCPUto CPU Core and RAM. • clkFLASHto Flash and EEPROM. • In different sleep modes some of these clock signals are inactive. • The Asynchronous Timer oscillator allows the Asynchronous Timer/Counter 2 to be clocked directly from an external 32.768kHz clock crystal. This allows using this Timer/Counter as a real-time counter even when the device is in sleep mode.

6. Clock Distribution (contd.)

7. Sleep Modes_Power Management Functions • The AVR provides six sleep modes allowing the user to save power, they namely shut down unused modules in the μC. • the file sleep.h, located in the .\INC subdirectory. must be #included before using the functions. #include <sleep.h> • To enable sleep modes the following function is used: sleep_enable() • And to leave the sleep modes use the function: sleep_disable() * only available with external crystals.

8. Sleep Modes_Power Management Functions (continued) • idle • In this mode the CPU is stopped, but the SPI, USART, Analog Comparator, ADC, Two wire Serial Interface, Timer/Counters, Watchdog, and the interrupt system continue operating; whereby the CPU can wake up from external triggered interrupts as well as internal ones. • This sleep mode basically halts clkCPU and clkFLASH • powerdown • the External Oscillator is stopped, while the External interrupts, the Two-wire Serial Interface address match , and the Watchdog continue operating. Only an External Reset, a Watchdog Reset, a Brown-out Reset, a Two-wire Serial Interface address match interrupt, an External level interrupt on INT0 or INT1, or an External interrupt on INT2 can wake up the MCU. • This sleep mode basically halts all generated clocks, allowing operation of asynchronous modules only.

9. Sleep Modes_Power Management Functions (continued) • powersave • If Timer/Counter2 is clocked asynchronously, Timer/Counter2 will run during sleep. The device can wake up from either Timer2 Overflow or Output Compare event. • standby • If an external crystal is used. This mode is identical to Power-down with the exception that the Oscillator is kept running. • From Standby mode, the device wakes up in six clock cycles. • extended_standby • If an external crystal is used. This mode is identical to Power-save mode with the exception that the Oscillator is kept running. • From Extended Standby mode, the device wakes up in six clock cycles..

10. Effect of Sleep Modes on Clock Domains and Wake Up Sources • If an enabled interrupt or a reset occurs while the μC is in a sleep mode, the μC wakes up. If external Crystal is used If Timer/Counter2 is clocked asynchronously 3. Only INT2 or level interrupt INT1 and INT0.

11. Notes: • Analog to Digital Converter If enabled, the ADC will be enabled in all sleep modes. To save power, the ADC should be disabled before entering any sleep mode. • Analog Comparator When entering Idle mode, the Analog Comparator should be disabled if not used. When entering ADC Noise Reduction mode, the Analog Comparator should be disabled. In the other sleep modes, the Analog Comparator is automatically disabled. • Brown-out Detector If the Brown-out Detector is not needed in the application, this module should be turned off. If the Brown-out Detector is enabled by the BODEN Fuse, it will be enabled in all sleep modes. In the deeper sleep modes, this will contribute significantly to the total current consumption.

12. Watchdog Timer If the Watchdog Timer is not needed in the application, this module should be turned off. If the Watchdog Timer is enabled, it will be enabled in all sleep modes. In the deeper sleep modes, this will contribute significantly to the total current consumption. • Port PinsWhen entering a sleep mode, all port pins should be configured to use minimum power. The most important thing is then to ensure that no pins drive resistive loads. In sleep modes where both the I/O clock (clkI/O) and the ADC clock (clkADC) are stopped, the input buffers of the device will be disabled. This ensures that no power is consumed by the input logic when not needed. In some cases, the input logic is needed for detecting wake-up conditions, and it will then be enabled.