MICROSYSTEMS LABORATORY DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING

MICROSYSTEMS LABORATORY DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING A CMOS Voltage Adjustable All-Pass Circuit Robert W. Newcomb Talk for SWAN 06 December 8, 2006 (Systems Workshop on Adaptive & Networks) At the Automation and Robotics Research Institute The University of Texas at Arlington

2 With Great Thanks to, and Respect for, Frank Lewis And especially for taking the initiative to Organize SWAN 06

3 Main topic of this talk: The design of a VLSI all-pass CMOS circuit for variable phase controlled by a voltage . Possible uses: An alternate type of phase locked loop (may have a phase noise advantage) Phase correction for various purposes. Outline: The degree one circuit of Maundy-Aronhime; Generalization to any degree Conversion to VLSI transistors; VLSI layout Spice simulations; MathCad symbolic analysis At end: Some Microsystems research topics.

4 The ideas are based upon the circuit of Maundy & Aronhime. Their circuit gives Vout=2*V3-Vin Using the RC voltage divider V3={(1/sC)/[R+(1/sC)]}Vin which is V3={1/[1+sRC]}Vin gives the degree one all-pass transfer function Vout/Vin=[1-sRC]/[1+sRC] = T(s)=1/T(-s) Angle T(jw) = -2*arctan(RCw); |T(jw)|=1 Reference: B. J. Maundy & P. Aronhime, "A Novel First-Order All- Pass Filter," International Journal of Electronics, Vol. 89, No. 9, 2002, pp. 739 - 743.

5 The Maundy - Aronhime Circuit IDM2=IDM1=>VGSM1=VGSM2=>V3-Vx=Vb-0 IDM4=IDM3=>VGS4=VGS3=>Vin-Vy=Vx-0 IDM6=IDM5=>VGS6=VGS5=>V3-Vo=Vy-0 => Vo=V3-Vy=V3-[Vin-Vx]=V3-[Vin-(V3-Vb)] => Vo=2V3-Vin -Vb Here Vb is a DC offset; M4&M3 require Vin offset > 2Vthreshold NMOS

6 Generalization to arbitrary rational all-pass

7 Transistorization for VLSI and with variable R

8 Spice run: Phase in degrees

9 Spice run: Magnitude in DB

Bias conditions for proper operation 10 Need to account for offsets due to substrates of M2, M4, M6 Not connected to their sources; adds [(-Vbs)^½-^½] to VTO

11 Small Signal Analysis By replacing each transistor by its pi equivalent, and Numbering x=4, y=5, ground=6, the indefinite Y matrix is obtained. Deleting the 6th row and column yields the nodal admittance matrix. Form the 2-port Y(s)=Y11-Y12*Z22*Y21 where Z22=Y22^-1 From which: T(s)=-Y(s)[2,1]/Y(s)[2,2] Display by float 4 to 4 digitsand then solve, for the poles and zeros at different resistor control voltages, Vr.

12 Using MathCad symbolic analysis, by eliminating Internal nodes (3,4,5) the transfer function is obtained At Vr=1; At Vr=2;

13 Mathcad plots from symbolic transfer function

14 VLSI Layout for 1.2U AMI fabrication 6 main transistors 10ux10u, cap 38ux32u Out Vdd Vr In Vb Gnd

15 Other research topics of Microsystems Laboratory: 1. Use of ABR (=Acoustic Brain-Stem Response) for characterizing hearing loss and creation of hearing aids. Possible use for control of Parkinsons' disease. 2. Use of Beeler-Reuter heart models for VLSI mimic of heart electrical control for effect of drugs on arrythmias. 3. Spice models for flexible transistor circuit design. 4. Spice models of DNA electrical characterization and use of braid group models of DNA type structures. 5. Use of nano sized Y-junctions for room temperature nano-computers based upon electron swarms. 6. Neural networks using single electron quantum dots. 7. VLSI realization of Prof. Roa’s neural simulink model incorporating Ca channels. 8. Wireless data collection for on patient sensors

MICROSYSTEMS LABORATORY DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING