CPE555A: Real-Time Embedded Systems

1. CPE555A:Real-Time Embedded Systems Lecture 4 Ali Zaringhalam Stevens Institute of Technology

2. Outline • Procedure Calls • I/O • Exception Handling • Multitasking CS555A – Real-Time Embedded Systems Stevens Institute of Technology

3. Memory Models Global variable. Allocated at compile time. Local/automatic variables. Allocated on the stack at run time. Dynamic variables. Allocated in the heap area at run time. CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 3

4. Procedure Call: Return 6 26 opcode=3 immediate J-Type Format CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 4

5. Example CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 5

6. Argument Passing & Return Value CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 6

7. What Could Go Wrong? CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 7

8. Call Stack The natural data structure for spilling registers into memory is a call stack (a last-in first-out structure) Register values are pushed and saved on the stack when the procedure is called and popped from the stack into the original register at return Historically call stacks “grow” from High address to low address A stack pointer is used to address the first unused memory location MIPS software uses register 29 for stack pointer and refers to it as $sp other machines (e.g., 80x86) may use a special-purpose stack pointer High Address main Proc1 Proc2 Proc3 $sp Proc4 Low Address CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 8

9. Pushing a Register on the Stack Suppose the called procedure wants to use reg16 It must push register reg16 to save it subi $sp, $sp, 4 Makes room for a 4-byte word on the stack sw reg16, 0($sp) Stores reg16 into stack memory Now the called procedure can use reg16 -4 Stack Pointer: $sp Stack “Top” Carnegie Mellon Stack “Bottom” Increasing Addresses Stack Grows Down CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 9

10. Popping a Register From the Stack +4 Carnegie Mellon Stack “Bottom” • Before the procedure returns, it must restore reg16 to original value • Pops stack into register reg16 • lw reg16, 0($sp) • Loads reg16 from stack memory • addi $sp, $sp, 4 • Pops the stack • Now the callee can use reg1 as before Increasing Addresses Stack Grows Down Stack Pointer: $sp Stack “Top” CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 10

11. Example - Continued Save current values on stack. Now you can use/overwrite the registers. Restore old values to the registers. CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 11

12. $sn and $tm In the example the procedure saved and restored every register it intended to use without knowing whether they were used by the caller. When too many registers are spilled, performance suffers. The alternative is to define and adhere to a protocol where all procedures assume that certain registers need not be saved and restored across a procedure call. MIPS assembler conventions are: 10 registers (8-15 and 24-25) are designated as temporary registers that need not be preserved by the callee. They are referred to as $t0-$t9 if the caller uses $t0-$t9 it must save them before the call and restore them on return (caller-saved). 8 registers 16-23 are designated as saved registers that must be preserved by the callee. They are referred to as $s0-$s7 if the callee uses $s0-$s7 it must save them when the procedure is entered and restore them on return (callee saved). It doesn’t bother with $t0-$t9. the caller will not save $s0-$s7, and the callee will not save $t0-$t9 CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 12

13. Recompilation Using Register Spilling Rules CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 13

14. But There is More to Spill! CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 14

15. Compiled Code Oooooops! CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 15

16. The Problem & Solution CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 16

17. Compiled Recursive Procedure CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 17

18. Stack Frame Pattern CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 18

19. What Else? CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 19

20. The Frame Pointer CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 20

21. Frame & Stack Pointers After the call Before the call During the call CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 21

22. Stack Frames Contents Local variables Return information Temporary space Management Space allocated when enter procedure “Set-up” code Deallocated when return “Finish” code Carnegie Mellon Frame Pointer: $fp Stack Pointer: $sp Stack “Top” CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 22

23. Example $fp $sp Carnegie Mellon Stack yoo yoo(…) { • • who(); • • } yoo who amI amI amI amI CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 23

24. Example $fp $sp Carnegie Mellon Stack yoo yoo(…) { • • who(); • • } yoo who(…) { • • • amI(); • • • amI(); • • • } who amI amI amI amI CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 24

25. Example $fp $sp Carnegie Mellon Stack yoo yoo(…) { • • who(); • • } yoo who(…) { • • • amI(); • • • amI(); • • • } amI(…) { • • amI(); • • } who amI amI amI amI CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 25

26. Example $fp $sp Carnegie Mellon Stack yoo yoo(…) { • • who(); • • } yoo who(…) { • • • amI(); • • • amI(); • • • } amI(…) { • • amI(); • • } who amI(…) { • • amI(); • • } amI amI amI amI CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 26

27. Example $fp $sp Carnegie Mellon Stack yoo yoo(…) { • • who(); • • } yoo who(…) { • • • amI(); • • • amI(); • • • } amI(…) { • • amI(); • • } who amI(…) { • • amI(); • • } amI amI amI(…) { • • amI(); • • } amI amI CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 27

28. Example $fp $sp Carnegie Mellon Stack yoo yoo(…) { • • who(); • • } yoo who(…) { • • • amI(); • • • amI(); • • • } amI(…) { • • amI(); • • } who amI(…) { • • amI(); • • } amI amI amI amI CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 28

29. Example $fp $sp Carnegie Mellon Stack yoo yoo(…) { • • who(); • • } yoo who(…) { • • • amI(); • • • amI(); • • • } amI(…) { • • amI(); • • } who amI amI amI amI CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 29

30. Example $fp $sp Carnegie Mellon Stack yoo yoo(…) { • • who(); • • } yoo who(…) { • • • amI(); • • • amI(); • • • } who amI amI amI amI CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 30

31. Example $fp $sp Carnegie Mellon Stack yoo yoo(…) { • • who(); • • } yoo who(…) { • • • amI(); • • • amI(); • • • } amI(…) { • • amI(); • • } who amI amI amI amI CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 31

32. Example $fp $sp Carnegie Mellon Stack yoo yoo(…) { • • who(); • • } yoo who(…) { • • • amI(); • • • amI(); • • • } who amI amI amI amI CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 32

33. Example $fp $sp Carnegie Mellon Stack yoo yoo yoo(…) { • • who(); • • } who amI amI amI amI CS555A – Real-Time Embedded Systems Stevens Institute of Technology CS555A – Real-Time Embedded Systems Stevens Institute of Technology Fall 2014, arz 33

34. Typical Microcontroller Board • Has both digital and analog I/O Stellaris R LM3S8962 evaluation board CS555A – Real-Time Embedded Systems Stevens Institute of Technology

35. Interface Types • Parallel: multiple data lines for data • Speed • Short distance • Examples: PCI (Peripheral Component Interconnect), ATA (Advanced technology Attachment) • Serial: single data line for data • Longer range than parallel • Examples: USB, RS232, I2C, SPI, PCI-Express • Synchronous: there is a clock signal between transmitter and receiver • Examples: USB, I2C, SPI • Asynchronous: no clock between transmitter and receiver • Uses START/STOP bits • Examples: RS232, UART CS555A – Real-Time Embedded Systems Stevens Institute of Technology

36. General-Purpose I/O (GPIO) • Open collector circuits are used for GPIO pins • The same pin can be used for input and output • Multiple controllers can be connected to the same bus Wired NOR CS555A – Real-Time Embedded Systems Stevens Institute of Technology

37. RS-232 Standard • RS-232 is a common interface and supports asynchronous serial connections • RS-232 is being replaced by USB Voltage levels for an ASCII "K" character (0x4B) with 1 start bit, 8 data bits and 1 stop bit. DB9 CS555A – Real-Time Embedded Systems Stevens Institute of Technology

38. Universal Asynchronous Receiver Transmitter (UART) • The UART provides hardware support for • Parallel-to-Serial and Serial-to-Parallel conversion • Start and Stop Bit framing • Parity Generation • Baud-Rate Generation (2400-115.2kbps) • UART supports Interrupts • Transmit Complete • Transmit Data Register Empty • Receive Complete • Serial interface specification (RS232C) • Start bit • 6,7,8,9 data bits • Parity bit optional • Stop bit CS555A – Real-Time Embedded Systems Stevens Institute of Technology

39. UART Register Interface • CPU uses registers to interact with UART • UDR (UART Data Register) • CPU writes byte to transmit • CPU reads received byte • USR (UART Status Register) • Rx/Tx complete signal bits • Framing error, overflow signal bits • UCR (UART Control Register) • Interrupt enable bits • Rx/Tx enable bits • Data format control bits (e.g. optional parity bit) • UBRR (UART Baud Rate Register) • Baud rate generator division ratio CS555A – Real-Time Embedded Systems Stevens Institute of Technology

40. UART Transmission • Send a byte by writing to UDR register • UART sets TXC bit in USR when the final bit has finished transmitting • UART triggers Tx Complete interrupt if enabled in the UCR • CPU must wait for current byte to finish transmitting before sending the next one CS555A – Real-Time Embedded Systems Stevens Institute of Technology

41. UART Receive • How does the CPU know a byte has arrived? Two methods aviaiable: • Polling: poll the RXC bit in USR or • Interrupt: enable the Rx Complete interrupt and write an ISR routine to handle it • Read received bytes from the UDR register CS555A – Real-Time Embedded Systems Stevens Institute of Technology

42. UART Baud Rate • Set by UBRR (Baud Rate Register) • UBRR (0-255) • BAUD=fCK/[16*(UBRR+1) • fCK is the crystal clock frequency CS555A – Real-Time Embedded Systems Stevens Institute of Technology

43. Interfacing I/O Devices • How does the CPU interface I/O devices? • How is data transferred to/from memory? • Role of operating system (OS) • provides system calls for accessing devices (e.g., read, write, seek) • protects one user’s data from another • handles interrupts from devices • provides fair I/O access to users and maximize throughput CS555A – Real-Time Embedded Systems Stevens Institute of Technology

44. I/O Instructions • Addressing: the CPU must be able to address individual devices • Command interface: the CPU must use instructions to send commands to I/O devices • Two techniques • Isolated I/O: special instructions for I/O (e.g., IN, OUT) • memory-mapped I/O: same instruction set as for memory references (e.g., LOAD, STORE) CS555A – Real-Time Embedded Systems Stevens Institute of Technology

45. Isolated I/O CPU Memory Independent I/O bus Processor-memory bus Interface Interface I/O Peripheral I/O Peripheral • Separate instructions for memory and I/O references • IN R1, device_Address • Separate memory & I/O address space • either physically separate bus (shown in diagram above) • or same physical bus with a signal to indicate memory or I/O • Used in Intel 80x86 CS555A – Real-Time Embedded Systems Stevens Institute of Technology

46. Memory-Mapped I/O Memory CPU ROM • Common memory & I/O bus • Same instruction set for memory access & I/O • e.g., LOAD R1, 0(R5): R5 maps to an external I/O register • Same address space for memory & I/O • More prevalent than isolated I/O: used in RISC processors RAM Common Memory & I/O bus Interface Interface I/O I/O Peripheral I/O Peripheral CS555A – Real-Time Embedded Systems Stevens Institute of Technology

47. Polling • Main loop uses each I/O device periodically • If output is to be produced, produce it • If input is ready, read it • Example: • USR (UART Status Register) • Rx/Tx complete signal bits CS555A – Real-Time Embedded Systems Stevens Institute of Technology

48. Send on a Polled UART I/0 Loop until TX buffer is empty (6th bit of Status register is set to 1) Write Data register with your data. CS555A – Real-Time Embedded Systems Stevens Institute of Technology

49. Send a Byte Sequence The lower the I/O speed the more CPU cycles are wasted. As CPU clock rate increases, there is more in polling penalty. (8/57600)*(18000000)=2500 cycles CS555A – Real-Time Embedded Systems Stevens Institute of Technology

50. Receive With Polling Loop until RX buffer is full (8th bit of Status register is set to 1) Why? CS555A – Real-Time Embedded Systems Stevens Institute of Technology