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Latency and Synchronization update

This update discusses the sources of latency and synchronization in a system, presenting new measurements and revised estimates for better understanding and performance. Key factors affecting latency include component measurements and path delays, with previous data from UCLA, RICE, and Florida contributing to the analysis. The update showcases how critical paths such as CSC-->DTTF are improved with new firmware estimates, resulting in reduced latency for better synchronization. The presentation highlights the impact of changes in processing times and system configurations on overall performance.

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Latency and Synchronization update

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  1. Latency and Synchronization update

  2. Latency: Sources of numbers • previous numbers were measured! • Components individually measured/understood by responsibles*except the CSC-->DT part. • UCLA • RICE • Florida • System measured as a whole during 2003 testbeam • System partially re-measured 2005 at slice-test • System partially re-measured 2006 at MTCC & overall validation vs DT arrival time @ GMT understood. • The new numbers presented today reflect well-understood “deltas” from previous estimates

  3. (Previous) Chamber + Peripheral Crate 11m cables to GMT MPC Chamber, CFEB, AFEB, ALCT 94m optical fibers MS 14.5m cable TMB/CLCT SP

  4. (previous) ..add it up: Critical path

  5. CSC  DTTF Critical Path • This path is too slow: • CSC primitives a bit slower than TDR estimate • DTTF a bit slower than TDR estimate • CSC primitives arrive at DTTF at 67 bx • (this path not broken out in the TDR) • Revised estimate using TMB2005 firmware • 64.2 bx CSC primitives arrive at DTTF • New estimate using TMB2007 firmware • 62.2 bx CSC primitives arrive at DTTF

  6. (TMB2005) Chamber + Peripheral Crate 11m cables to GMT MPC Chamber, CFEB, AFEB, ALCT 94m optical fibers MS 14.5m cable TMB/CLCT SP

  7. Revised estimate using TMB2005 firmware • CSCDTTF total 6764.2 bx, difference is -2.8 bx • Front-end is +1.2 bx: • -0.8bx because critical path is actually ME4/1, not ME1/1 (longer optical fibers to SP), Skewclear are shorter. • +1.0bx maximum drift delay 3 bx, not 2bx. • +1.0bx because comparator delay to peak of CFEB amplifier output better set at 3 bx, not 2 bx. • TMB processing is -3 bx: • previously waited for ALCT before CLCT started “pretrigger” stage (configuration mistake, i.e. “pilot error”) • 19 bx  16 bx (TDR was 15.5) • TMBMPC is -1 bx: • previously overestimated backplane propagation as 2 bx

  8. New estimate using TMB2007 firmware • CSCDTTF total 6762.2 bx, difference is -4.8 bx • TMB processing 1614 bx: • -1.0 bx in CLCT processing I/O synchronization: input from CFEB save 0.5 bx, output to TMB matching logic with ALCT save 0.5 bx. • -1.0 bx in internal processing of ALCT-CLCT matching.

  9. Details:

  10. Latency Summary • CSC-TF path: • Previous estimate 80.5 bx • This is reduced to 77.7 bx currently • Reduces to 75.7 bx with new firmware (compare to TDR 78 bx) • CSCDTTF path: • Previous estimate 67 bx • This is reduced to 64.2 bx currently • Reduces to 62.2 bx with new firmware • No TDR estimate, but DTTF waits for CSC primitives starting at bx 60 (Janos Ero, longer-than-anticipated optical cables)

  11. Synchronization spreadsheet update • Spreadsheet: re-ordered plots sensibly and added a “key” to describe all the Excel plots

  12. Sync Spreadsheet: updating parameters after “pilot error” fix • L1A timing looks much more sensible

  13. Comments • Data taken with various comparator thresholds • Quick look: 12mV best? Would like to verify with DQM and other offline study • Use 12 mV for subsequent studies • Best trigger timing settings? • Data taken with various drift_delays for ALCT and CLCT • Data taken with various comparator delays to peak • Data taken with various “triad persistence” values • NEED information on what happens to trigger efficiencies • Also need to run with new pattern-finding firmware as soon as it’s ready to verify some of the settings.

  14. ALCT fine delays • Dayong “test” of analysis: revert to old firmware phases, try diddling fine delays a little, take data and see if he can find the offset. • Also, a few typos to fix (mine) in getting from Misha’s numbers to the XML file. • Otherwise, new TMB clocking phases should result in constant offset in clock time to all ALCTs, should be invisible to cosmic ray data – to verify. • Then, apply Dayong corrections – is relative timing perfect? • I still want to “predict” ALCT fine delays with spreadsheet… just need a few hours analysis time…

  15. Comments I • Best trigger timing settings? • 12 mV deemed best comparator threshold, but is it? • Data taken with various drift_delays for ALCT and CLCT • Data taken with various comparator delays to peak • Data taken with various “triad persistence” values • NEED information on what happened to trigger efficiencies • New pattern-finding firmware: • We’d like to verify some of the timing settings (some will change, e.g. pretrigger earlier with 2 layers rather than 4). • Changes to CLCT/TMB emulator code will be needed (Slava).

  16. Comments II • TMB qualities: 4-bit = 16 choices: 6 di-strip qualities gone • Can get by for now just using 10 out of 16 qualities • Slava: reassignment of qualities should be intimately connected with accelerator vs. collision muons question. • Nobody thought through accelerator muons all the way: • Tailor ALCT collision patterns specific to chamber? • ALCT accelerator patterns switched on? • What priority do accelerator muons have? (currently TMB  low quality, but people do want accel. muon trigger) • The SP doesn’t yet handle accelerator muons appropriately (horizontal coincidence)

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