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Tutorial Chapter 3 Gate_level Minimization Part 2

Tutorial Chapter 3 Gate_level Minimization Part 2. TA. Arwa Al Saad . 9 November 2013. NAND and NOR Implementation. - Digital circuits are frequently constructed with NAND or NOR gates rather than with AND and OR gates. NAND Circuits.

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Tutorial Chapter 3 Gate_level Minimization Part 2

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  1. Tutorial Chapter 3Gate_levelMinimizationPart 2 TA. Arwa Al Saad. 9 November 2013

  2. NAND and NOR Implementation - Digital circuits are frequently constructed with NAND or NOR gates rather than with AND and OR gates.

  3. NAND Circuits • NAND gate: a universal gate – Any digital system can be implemented with it • including AND, OR and complement

  4. Steps of Implementation two levels NAND gates • Express simplified function in sum of products. • Change every AND in first level to AND-invert. • Change OR in second level to AND-invert or invert-OR • Invert any single literal in the first level.

  5. Two-Level Implementation with NAND • sum of product expression and its equivalent NAND implementation = [(AB)’*(CD)’]’ F = AB + CD

  6. Question#1 • Draw a NAND diagram that implements the following function: F(A,B,C)=∑(5,6,7): F= AC+AB

  7. Diagram with AND,OR: Question#1 Diagram with AND-invert and invert-OR: Diagram with two AND-invert: F=((AC)’(AB)’)’ F= AC+AB

  8. Steps of implementing Multilevel NAND Circuits • Convert all AND gates to NAND gates with AND-invert graphic symbols. • Convert all OR gates to NAND gates with only invert-ORgraphic symbols. • Check all the bubbles in the diagrams. For a single bubble, invert an inverter (one-input NAND gate) or complement the input literal.

  9. NOR Circuite • The NOR gate is anothar universal gate to implement any Boolean Function.

  10. Steps of Implementation two levels NOR gates • Express simplified function in product of sum. • Change every OR in first level to OR-invert. • Change AND in second level to OR-invertor invert-AND. • Invert any single literal in the first level.

  11. Questions #2 • Draw a NOR diagram that implements the following function: F= (A+B)(C+D)E

  12. Questions #2 • Diagram with OR-invertand invert-AND:

  13. Steps of implementing Multilevel NOR Circuits • Convert all OR gates to NOR gates with OR-invertgraphic symbols. • Convert all AND gates to NOR gates with only invert-ANDgraphic symbols. • Check all the bubbles in the diagrams. For a single bubble, invert an inverter (one-input NOR gate) or complement the input literal.

  14. Draw logic diagram with NOR gate for the following function: F=(AB’ + A’B) (C+D’)

  15. Evolution 4 • Draw a NAND logic diagram that implements the following function: F(A,B,C,D)=∑(0,4,8,9,10,11,12,14)

  16. Q3.28 • Derive the circuits for a three-bit parity generator and four-bit checker using an odd parity bit • 0 means a correct transmission.

  17. Three-bit parity generator (odd) • F=(X Y Z)’

  18. Four-bit parity checker(odd) • F=(X Y Z)’

  19. DONE

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