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EE 5340 Semiconductor Device Theory Lecture 17 – Spring 2011. Professor Ronald L. Carter ronc@uta.edu http://www.uta.edu/ronc. Summary of V a > 0 current density eqns. Ideal diode, J s expd ( V a /( h V t )) ideality factor, h Recombination, J s,rec exp ( V a /(2 h V t ))
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EE 5340Semiconductor Device TheoryLecture 17 – Spring 2011 Professor Ronald L. Carter ronc@uta.edu http://www.uta.edu/ronc
Summary of Va > 0 current density eqns. • Ideal diode, Jsexpd(Va/(hVt)) • ideality factor, h • Recombination, Js,recexp(Va/(2hVt)) • appears in parallel with ideal term • High-level injection, (Js*JKF)1/2exp(Va/(2hVt)) • SPICE model by modulating ideal Js term • Va = Vext - J*A*Rs = Vext - Idiode*Rs
ln(J) Plot of typical Va > 0 current density equations data Effect of Rs Vext VKF
For Va < 0 carrierrecombination in DR • The S-R-H rate (tno = tpo = to) is
Reverse bias (Va<0)=> carrier gen in DR • Consequently U = -ni/2t0 • t0 = mean min. carr. g/r lifetime
Ecrit for reverse breakdown (M&K**) Taken from p. 198, M&K**
Reverse biasjunction breakdown • Avalanche breakdown • Electric field accelerates electrons to sufficient energy to initiate multiplication of impact ionization of valence bonding electrons • field dependence shown on next slide • Heavily doped narrow junction will allow tunneling - see Neamen*, p. 274 • Zener breakdown
Reverse biasjunction breakdown • Assume-Va= VR >> Vbi, so Vbi-Va-->VR • Since Emax~ 2VR/W = (2qN-VR/(e))1/2, and VR = BV when Emax = Ecrit(N- is doping of lightly doped side ~ Neff) • BV = e (Ecrit)2/(2qN-) • Remember, this is a 1-dim calculation
Junction curvatureeffect on breakdown • The field due to a sphere, R, with charge, Q is Er = Q/(4per2) for (r > R) • V(R) = Q/(4peR), (V at the surface) • So, for constant potential, V, the field, Er(R) = V/R (E field at surface increases for smaller spheres) Note: corners of a jctn of depth xj are like 1/8 spheres of radius ~ xj
BV for reverse breakdown (M&K**) Taken from Figure 4.13, p. 198, M&K** Breakdown voltage of a one-sided, plan, silicon step junction showing the effect of junction curvature.4,5
Diode equivalentcircuit (small sig) ID h is the practical “ideality factor” IQ VD VQ
Small-signal eqcircuit Cdiff and Cdepl are both charged by Va= VQ Va rdiff Cdepl Cdiff
Diode Switching • Consider the charging and discharging of a Pn diode • (Na > Nd) • Wn << Lp • For t < 0, apply the Thevenin pair VF and RF, so that in steady state • IF = (VF - Va)/RF, VF >> Va, so current source • For t > 0, apply VR and RR • IR = (VR + Va)/RR, VR >> Va, so current source
Diode switching(cont.) VF,VR >> Va F: t < 0 Sw RF R: t > 0 VF + RR D VR +
Diode chargefor t < 0 pn pno x xn xnc
Diode charge fort >>> 0 (long times) pn pno x xn xnc
Snapshot for tbarely > 0 pn Total charge removed, Qdis=IRt pno x xn xnc
I(t) for diodeswitching ID IF ts ts+trr t - 0.1 IR -IR
Ideal diode equation for EgN = EgN Js = Js,p + Js,n = hole curr + elecurr Js,p = qni2Dpcoth(Wn/Lp)/(NdLp), [cath.] = qni2Dp/(NdWn), Wn<< Lp, “short” = qni2Dp/(NdLp), Wn>> Lp, “long” Js,n = qni2Dncoth(Wp/Ln)/(NaLn), [anode] = qni2Dn/(NaWp), Wp<< Ln, “short” = qni2Dn/(NaLn), Wp>> Ln, “long” Js,n<<Js,p when Na>>Nd, Wn & Wpcnrwdth
Ideal diode equationfor heterojunction • Js = Js,p + Js,n = hole curr + elecurr Js,p = qniN2Dp/[NdLptanh(WN/Lp)], [cath.] = qniN2Dp/[NdWN], WN << Lp, “short” = qniN2Dp/(NdLp), WN >> Lp, “long” Js,n = qniP2Dn/[NaLntanh(WP/Ln)], [anode] = qniP2Dn/(NaWp), Wp<< Ln, “short” = qniP2Dn/(NaLn), Wp>> Ln, “long” Js,p/Js,n ~ niN2/niP2 ~ exp[[EgP-EgN]/kT]
The BJT is a “Si sandwich” Pnp (P=p+,p=p-) or Npn(N=n+, n=n-) BJT action: npn Forward Active when VBE> 0 and VBC< 0 E B C p n P VEB VCB Depletion Region Charge neutral Region Bipolar junctiontransistor (BJT)
IE IC IB x’ x x” xB x”c x’E 0 0 0 z 0 -WE WB+WC WB N-Emitter p-Base n-Collector Depletion Region Charge Neutral Region npn BJT topology
References * Semiconductor Physics and Devices, 2nd ed., by Neamen, Irwin, Boston, 1997. **Device Electronics for Integrated Circuits, 2nd ed., by Muller and Kamins, John Wiley, New York, 1986.
References * Semiconductor Physics and Devices, 2nd ed., by Neamen, Irwin, Boston, 1997. **Device Electronics for Integrated Circuits, 2nd ed., by Muller and Kamins, John Wiley, New York, 1986.