Web-Enabled Photovoltaic System Monitor

1. Web-Enabled Photovoltaic System Monitor Art Barnes Austin Fisher Ryan Mann Josh Stone

2. Mission Statement • To construct a photovoltaic monitor that is affordable for small photovoltaic installations. It will be capable of uploading system information to the web. The purpose of the system is to further awareness, aid in implementation and function as a diagnostic utility.

3. Baseline vs. Desired functionality Above the Line • Read from serial port and download code from serial • Sensor electronics integrated into module • Download new OS • Modem Communication THE LINE!! Below the Line • Download code from the web page • Ethernet Communication • Event Logging

4. Parts and Software Requirements • Hardware • Microcontroller • External Components • Sensors • PC Software • Monitor serial port to read bytes and write to data file • Format data file into web page • Upload OS and or configuration data via serial port • PV Monitor Software • Read sensor information through A/D • Pre-process data • Send data readings over serial • Monitor serial port for updates from server

5. Block Diagram

6. Hardware : Micro-controller : Why 68HC11E • Why Motorola 68HC11E • low power consumption (sleep mode) • wake on interrupt • watchdog timer • ease of availability and price • DIP package for mounting ease • Built-in SPI interface • Built-in RAM/EPROM

7. Hardware : Micro-controller : Features/Limitations • Features/Limitations • Low order address lines and data lines are multiplexed, requiring external latches • Must use wait mode with higher current drain in order to use internal timers to wake up • 8-bit resolution offered by internal A/D is insufficient, requiring external A/D • SPI interface specifies Enable pin, but selection logic is not included, requiring an FPGA

8. Hardware : Memory • 0000 – 01FF Internal RAM • 0200 – 03FF Sensor Config. • 1000 – 103F Register Block • 6000 – 7FFF External RAM • 8000 – FFFF External EPROM • B600 – 87FF Internal EEPROM

9. Hardware : FPGA Xilinx 4005E takes care of ‘chip selects’ and ‘enables’

10. Hardware : FPGA FPGA uses simple combinational logic to perform bus selection based on address lines

11. Hardware : FPGA

12. Hardware : A/D Converter and Multiplexer • Use 12-bit single channel A/D converter • 16 inputs are selected using a 16-1 analog multiplexer • Converter talks with microcontroller over the SPI interface • Converter has low power consumption when not enabled

13. Hardware : A/D Converter and Multiplexer

14. Hardware : Board Schematic

15. Hardware : Sensors • Sensors encapsulated into modular package • Analog level conversion and impedance matchingcircuitry • Sensor type and configuration set using on-board DIP switches • Sensor Types • Insolation Sensor • DC Voltage Sensor • DC Current Sensors • Temperature Sensors • AC Voltage Sensor • AC Current Sensor

16. Hardware : Sensors : Sensor Module • Consists of setting switch logic and analog conversion circuitry • Analog circuitry is specific to the type of sensor the module is intended to be used for

17. Hardware : Sensors : Sensor Module Settings • Use DIP switches on the sensor module to identify sensor type and port number of temperature compensation module • Enable pin of Buffer is used for chip select, connected to Xilinx 4005E chip select logic

18. Modem Communication • Still want to add this feature • Optional to system functionality PV Monitoring System Modem

19. Software : Monitor OS

20. Software : Host PC • Master Control Program (MCP) polls the serial port and writes the bytes read to a data file • MCP can send email to administrator if it detects erroneous readings • MCP can log errors for diagnostic purposes • MCP can wake up PV Monitor from sleep through the 68HC11’s interrupt-on-serial capability to change settings via serial port

21. PV System Monitor Current Statistics Panel Voltage (V) Panel Temp (degrees C) Panel Current (A) Power Supplied (W) Battery Voltage (V) 123.45 123.45 123.45 123.45 123.45 123.45 123.45 123.45 123.45 123.45 123.45 123.45 123.45 123.45 123.45 Software : Webpage • Simple, easy to read table layout Display One Hour History Display 24 Hour History Display One Week History Display One Month History

22. Parts Listing

23. Parts Cost • Xilinx FPGA $26.65 • Maxim A / D $6.95 • HC11 Microcontroller $5.12 • Maxim UART/RS232 $4.73 • Maxim Analog Mux $3.48 • AMD 32k EPROM $3.44 • 8k RAM $3.42 • Clock $1.21 • Discrete Logic, < $1 each • Buffers Latches • Sockets, etc… $40 • Prototype board $35 • LCD Display $25 Estimated Total $165

24. Currently…. • What Works: - Program can be burned onto EPROM and successfully run • What We Are Working On: - The FPGA is indicating a frame fault as it receives chip select data from the second EPROM We are currently in the debugging process

25. Schedule : Milestones • Milestone 1: Nov 7 • Load program via serial connection • Implement Sensors • Design sensor interfaces • Setup configuration data • Milestone 2: Nov 21 • Implement Flash memory • Setup web interfaces • Be able to upload data to server

26. Schedule : Comprehensive

27. Conclusion • Intentions before expo - complete “above the line” items - Provide full documentation on the project - Provide easy to use, brief manual - Prepare system for delivery to the sponsor