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Chapter 2. Introduction to Logic Circuits. Objectives. Know what Truth Tables are Know the Truth Tables for the Basic Gates AND, OR, NOT, NAND, NOR Know how to Analyze Simple Logic Circuits Via Timing Diagrams and Truth Tables
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Chapter 2 Introduction to Logic Circuits
Objectives • Know what Truth Tables are • Know the Truth Tables for the Basic Gates • AND, OR, NOT, NAND, NOR • Know how to Analyze Simple Logic Circuits • Via Timing Diagrams and Truth Tables • Be able to use Boolean Algebra to manipulate simple digital logic equations • Know what a Venn diagram is and how they apply to digital logic • Know how to implement a function in both Sum of Products and Product of Sums form • Know how to use Quartus II’s schematic entry tool to describe simple logic circuits • Know how to use Quartus II to simulate a logic circuit
Variables and Functions • Consider a Flashlight • L is the Function that represents the Flashlight • L = 0 when light is off, L = 1 when light is on • x is the Variable that represents the switch • Switch open x = 0, switch closed x = 1 • x is an input Variable • When x = 0 L = 0 • When x = 1 L = 1 • L(x) = x
AND & OR • Flashlight controlled by two switches in series = AND • L(x1,x2) = x1.x2 • Flashlight controlled by two switches in parallel = OR • L(x1,x2) = x1+x2 • AND and OR two very important building blocks
Inversion (NOT) • Light on if switch open • L = 1 if x = 0 • Light off if switch closed • L = 0 if x = 1 • L(x) = x • x = x’ = !x = ~x = NOTx
Truth Tables x1 x2 x1.x2 x1+x2 !x1 0 0 0 0 1 0 1 0 1 1 1 0 0 1 0 1 1 1 1 0 AND OR NOT
Logic Gates AND OR NOT (Inverter)
Logic Networks or Logic Circuits • Using AND, OR, and NOT logic functions of any complexity can be implemented • Number of gates/complexity of logic network is directly related to its cost • Reducing cost is always desirable • Reducing complexity is always desirable
Analysis of Logic Circuit • Analysis • Determine how an existing Logic Circuit functions • Synthesis • Design a new network that implements a desired Logic Function
Logic Analysis • Truth Table • Timing Diagram
Truth Table X1 X2 A B C D E f(X1,X2) 0 0 1 1 1 0 0 1 0 1 1 0 0 0 0 0 1 0 0 1 0 0 1 1 1 1 0 0 0 1 0 1 f(X1,X2) = !X1.!X2 + X1.X2 + X1.!X2
Timing Diagram X1 X2 A B C = A.B D = X1.X2 E = X1.B f(X1,X2) 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
Truth Table X1 X2 A B C D f(X1,X2) 0 0 1 1 1 0 1 0 1 1 0 0 0 0 1 0 0 1 0 1 1 1 1 0 0 0 1 1 f(X1,X2) = !X1.!X2 + X1
Timing Diagram X1 X2 A B C = A.B f(X1,X2) 1 0 1 0 1 0 1 0 1 0 1 0
Functionally Equivalent Circuits = !X1.!X2 + X1.X2 + X1.!X2 = !X1.!X2 + X1 !X1.!X2 + X1.X2 + X1.!X2 = !X1.!X2 + X1 Two equations result in same output – Which is better?
Boolean Algebra • In Boolean Algebra elements can take on one of two values, 0 and 1 • Axioms of Boolean Algebra • 1a. 0 . 0 = 0 • 1b. 1 + 1 = 1 • 2a. 1 . 1 = 1 • 2b. 0 + 0 = 0 • 3a. 0 . 1 = 1 . 0 = 0 • 3b. 1 + 0 = 0 + 1 = 1 • 4a. If x = 0 then !x = 1 • 4b. If x = 1 then !x = 0
Single-Variable Theorems 5a. x . 0 = 0 5b. x + 1 = 1 6a. x . 1 = x 6b. x + 0 = 0 7a. x . x = x 7b. x + x = x 8a. x . !x = 0 8b. x + !x = 1 9 !!x = x Validity easy to prove by substituting x = 0 and x = 1 and using the Axioms
Duality • Dual of an expression is achieved by • Replacing all ANDs with ORs and all ORs with ANDs • Replacing all 1s with 0s and all 0s with 1s
Two and Three Variable Properties Combining 14a. X . Y + X . !Y = X 14b. (X + Y) . (X + !Y) = X DeMorgan’s Theorem 15a. !(X . Y) = !X + !Y 15b. !(X + Y) = !X . !Y 16a. X + !X . Y = X + Y 16b. X . (!X + Y) = X . Y Commutative 10a. X . Y = Y . X 10b. X + Y = Y + X Associative 11a. X . (Y . Z) = (X . Y) . Z 11b. X + (Y + Z) = (X + Y) + Z Distributive 12a. X . (Y + Z) = X . Y + X . Z 12b. X + Y . Z = (X + Y) . (X + Z) Absorption 13a. X + X . Y = X 13b. X . (X + Y) = X Consensus 17a. X . Y + Y . Z + !X . Z = X . Y + !X . Z 17b. (X + Y) . (Y + Z) . (!X + Z) = (X + Y) . (!X + Z)
Algebraic Manipulation • !X1 . !X2 + X1 . X2 + X1 . !X2 =? !X2 + X1 • !X1 . !X2 + X1 . (X2 + !X2) • Via 12a. Distributive (X . Y) + (X . Z) = X . (Y + Z) • !X1 . !X2 + X1 . (1) • Via 8b. X + !X = 1 • !X1 . !X2 + X1 = !X1 . !X2 + X1 • Via 6a. X . 1 = X • !X2 +X1 • Via 16a. X + !X . Y = X + Y
!X2 + X1 !X1 . !X2 + X1 . X2 + X1 . !X2
Notation, Terminology, & Precedence • + versus + called sum • . versus . called product • = AND • = OR • NOT, AND, OR Order of Precedence
Synthesis or Design • If the alarm is enabled and the window is open the alarm should sound • Assign variable names and functions • Create truth table • Write Sum of Products or Product of Sums • Create Schematic or HDL
Assign Variable Names and Functions • Alarm Enabled = En • Window Open = Wo • Alarm Sound = Al
Write Sum of Products or Product of Sums f = En . Wo = Al En Al Wo
Cost • Total number of gates • Plus • Total number of inputs to all gates
Sum of Products • Uses minterms to express the function • f(X1,X2) = Σ(m0,m2,m3) = !X1 . !X2 + X1 . !X2 + X1 .X2 • Canonical Sum of Products • Note: Brown uses Σm(0,2,3) as a simple form • Using Boolean logic theorems and properties the Canonical Sum of Products expression can be manipulated to produce • f(X1,X2) = !X2 + X1 • Which is a Minimum Cost Sum of Products expression of f Row # X1 X2 f(X1,X2) 00 0 0 1 01 0 1 0 10 1 0 1 11 1 1 1 !X1 . !X2 - minterm X1 . !X2 - minterm X1 . X2 - minterm
Product of Sums • Uses Maxterms to express function • f(X1,X2) = П(M1) = (X1 + !X2). (!X1 + X2) • Canonical Product of Sums • Note: Brown uses П M(1) as a simple form • Also Minimum Cost Product of Sums in this case Row # X1 X2 f(X1,X2) 00 0 0 1 01 0 1 0 10 1 0 0 11 1 1 1 X1 + !X2 – maxterm !X1 + X2 – maxterm
Using De Morgan’s Theoremto generate Product of Sums • !f(X1,X2) = (!X1 . X2) + (X1 . !X2) • !(!f(X1,X2)) = !((!X1 . X2) + (X1 . !X2)) • f(X1,X2) = !(!X1 . X2) . !(X1 . !X2) • f(X1,X2) = (X1 + !X2) . (!X1 + X2) Row # X1 X2 f(X1,X2) 00 0 0 1 01 0 1 0 10 1 0 0 11 1 1 1
Minterm vs Maxterm • Σ = Minterm – rows where f(x) = 1 • П = Maxterm – rows where f(x) = 0 Row # X1 X2 f(X1,X2) 00 0 0 1 01 0 1 0 10 1 0 1 11 1 1 1 !X1 . !X2 - minterm X1 + !X2 - maxterm X1 . !X2 - minterm X1 . X2 - minterm f(X1,X2) = Σ(m0,m2,m3) = !X1 . !X2 + X1 . !X2 + X1 .X2 f(X1,X2) = П(M1) = X1 + !X2
Further Examples • f(m0,m2,m3,m7) • Truth table • Sum of Products • Product of Sums • Minimization • Schematic • Timing Diagram
Sum of Products !X1!X2!X3 + !X1X2!X3 + !X1X2X3 + X1X2X3 !X1!X3(!X2 + X2) + X2X3(!X1 + X1) !X1!X3 + X2X3
Product of Sums (X1+X2+!X3)(!X1+X2+X3)(!X1+X2+!X3)(!X1+!X2+X3) ((X1 +!X3)+X2)((!X1+X3)+X2)((!X1+X3)+X2)((!X1+!X3)+X2)((!X1+!X3)+X2)((!X1+X3)+!X2) A B B C C D A B C D A C B D ((X1 +!X3)+X2)((!X1+!X3)+X2)((!X1+X3)+X2)((!X1+X3)+!X2) ((X1 +!X3)+X2)((!X1+!X3)+X2)((!X1+X3)+X2!X2)
NAND and NOR Gatesvia DeMorgan’s Theorem !(X1.X2) = !X1 + !X2 = !X1 + !X2 !(X1 + X2) = !X1.!X2 = !X1.!X2
NAND gates in Sum of ProductsNOR gate in Product of Sums Sum of Products Product of Sums
Design Example • Three-Way Light Control • Did you understand the book’s example? • Multiplexer Circuit
Reading Laboratory Preparation • Chapter 2 – Omit section 2.10 • Quartus II Introduction Using Schematic Design • ftp://ftp.altera.com/up/pub/Altera_Material/QII_9.0/Digital_Logic/DE2/Tutorials/tut_quartus_intro_schem.pdf
Homework Problems • 2.1-2.4, 2.6, 2.8, 2.9, 2.10 • 2.28-2.30 Create Truth Table, attempt to minimize, and write SOP & POS • 2.31-2.34 Create Truth Table, attempt to minimize, and write required form • 2.35 Create Truth Table • 2.44, 2.45 Print or save as jpg and email Schematic and Simulator Waveform
Schematic Design Poor Good