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TGC ROD Performance

TGC ROD Performance. Lorne Levinson, Daniel Lellouch June 2002. TGC ROD performance. Expected backgound rates. Data rates from Front end link to ROD crate Hits are background from Fluka “AV5” (Ian Dawson Jun-00) fluences plus small electronics noise. Simulation assumptions.

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TGC ROD Performance

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  1. TGC ROD Performance Lorne Levinson, Daniel Lellouch June 2002 L. Levinson, Weizmann Institute of Science

  2. TGC ROD performance L. Levinson, Weizmann Institute of Science

  3. Expected backgound rates • Data rates from Front end link to ROD crate • Hits are background from Fluka “AV5” (Ian Dawson Jun-00) fluences plus small electronics noise L. Levinson, Weizmann Institute of Science

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  5. Simulation assumptions • One complete Endcap doublet Local Data Block (15 Slave Boards) • One complete Endcap triplet Local Data Block (18 Slave Boards) • For 100%, this corresponds to: • 0.91 hits per doublet LDB and 0.83 hits per triplet LDB • 0.06 tracks per doublet pair LDB and 0.31 tracks per triplet LDB. • “hit” = signal in both strips and wires • “track” = hits in all 4 layers of a doublet pair and in all 3 layers of a triplet • strips have been pair-wise OR’ed in h • a triplet strip coincidence is considered to be 1-out-of-2 • chamber efficiency = 99.2% was included • Level-1 rate was about 600kHz L. Levinson, Weizmann Institute of Science

  6. Functionality • TTC signals/ROD BUSY from/to TTC emulator • Synchronization verification • Fragment verification • Fragment building (up to 4 FE links • Hit decoding to readout format • Coincidences to ‘tracklet’ format for doublet/triplet wires/strips • 1 or 3 BCs • Optional raw data pass thru’ • ROB output format • S-link output • Sampled output for VME • DAQ SW verifies all the ROD output formats and produces an intelligent formatted dump of events and messages L. Levinson, Weizmann Institute of Science

  7. Trace of event flow L. Levinson, Weizmann Institute of Science

  8. Output to the ROB L. Levinson, Weizmann Institute of Science

  9. END L. Levinson, Weizmann Institute of Science

  10. Proposal for FE link protocol changes • handle BCs: 0, -0, 0+, -0+ \use indicator in cell addr byte (cell 18 is last cell): • 0: R00AAAAA +1: R01AAAAA -1: R11AAAAA rsrv:R10xxxxx • control mode for B0F0, E0F0, and 16 bits each (actually high 14) • 16-bit alignment: • since there is now an addr even for +/-BC cells, • guaranteed 16-bit alignment for celladdr/bitmap • trailer alignment by padding to 16-bits only, not 32-bits means always a xDF, xB3 at end L. Levinson, Weizmann Institute of Science

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  13. Current functionality • Fragment building for 1 to 4 inputs • Tested with one source Star Switch that read out 2 SBICs (c.f. 18 SBICs) • one triplet wire SBIC, one doublet wire SBIC • c.f. final: 12 normal Star Switch + 1 Sector Logic / HIPT Star Switch • Handles 1 BC or 3BCs (trigger BC 1 BC) • ROD HW produces: • hit list • “tracklets”=3-out-4 doublet coincidences and 2-out-of-3 triplet coincidences • Exceptions from error checking, debug info, etc. • Output format for the ROB / ROD Crate DAQ (sampling) • can include a copy of the input data from the Star Switch • new TGC ROB-input data format document • Flow control via RODBUSY veto of Level-1 Accept when input buffers fill up • DAQ SW verifies all the ROD output formats and produces an intelligent formatted dump of events and messages L. Levinson, Weizmann Institute of Science

  14. The plan presented in the Off-detector PDR: Coloured symbols indicate thosefunctions for which at least basicfunctionality exists L. Levinson, Weizmann Institute of Science

  15. Example event dump L. Levinson, Weizmann Institute of Science

  16. ROD Crate DAQ SW • Written with proper interfaces for the ATLAS Online (“BackEnd”) system • all written in C++, future GUIs in Java • ATLAS DAQ-1 buffer manager was not made available • use another (used by MDT test beam, from CLOE) • C++ wrapper for Buffer Manager • Uses ATLAS VME library • Linux interrupt handler for ROD data ready interrupts (Galia) L. Levinson, Weizmann Institute of Science

  17. TGC ROD Crate DAQ data flow collector analyzer Buffer Manager Interrupt handler ROD L. Levinson, Weizmann Institute of Science

  18. Next -- SW • DAQ SW integration with ATLAS BackEnd online packages • Implement Use Cases • In addition to dataflow, focus on configuration, calibration, diagnostics, monitoring… • Implement “analysis” tools • Monitor framework • Calibration run framework • Histogramming • Trigger logic verifier • Data recording • DAQ to DCS Communication – “DDC” package L. Levinson, Weizmann Institute of Science

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  23. Then make new main board L. Levinson, Weizmann Institute of Science

  24. Additional new hardware • Test handling of TTC signals • TTC emulator for testing • More error recovery • Strategy for handling data errors • Final ROD crate TTC: • dedicated TTC VME board per crate, or • TTCrx receiver for each ROD • Handle Sector Logic/HipT data • Tracklet verification • New VME interface L. Levinson, Weizmann Institute of Science

  25. Plans • Consolidate experience gained from Japan • Cleanup code • Add functions • Full integration with ATLAS “online” software (“BackEnd”) • Consider another trip to Japan • Full error recovery and statistics • Performance tests with realistic fake data from Star Switch • ROD—ROB integration at CERN (?? February ATLAS week) • Final ROD prototype end of this year L. Levinson, Weizmann Institute of Science

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