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Group 6

Group 6. 醫工所碩士二年級 R90548009 葉昱甫 電子所碩士一年級 R91943057 謝博鈞 電信所碩士一年級 R91942041 王欣平. Outline. HW/SW Partition Design Hardware Design Simulation Model. Accumulative Multiplication Suitable for Hardware Processing. Also suitable for Hardware. Quantization.

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Group 6

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  1. Group 6 醫工所碩士二年級 R90548009 葉昱甫 電子所碩士一年級 R91943057 謝博鈞 電信所碩士一年級 R91942041 王欣平

  2. Outline • HW/SW Partition Design • Hardware Design • Simulation Model

  3. Accumulative Multiplication • Suitable for Hardware Processing

  4. Also suitable for Hardware

  5. Quantization • It is basically a set of division operations and a simple table lookup. • Suitable for Hardware

  6. Zigzag scan • Reordering of sequence • Not suitable for HW • Huffman Coding • Pure table lookup • Suitable for Software

  7. Design Block Diagram Hardware RGB to YUV 8x8 Blocks DCT Quantization Compressed Image Huffman Coding Zigzag Scan Software

  8. Timing diagram

  9. MYIP

  10. Syntax 1.Check error 2.Auto make hierarchy for design Top Module Sub module 1 Make File Sub module 2 Net.v Xilinx Sub module 4 Sub module3 design script

  11. Environment TOP Sub module 1 Sub module 4 design Sub module 2 Sub module3 Test pattern ARM AHBA Simulation environment model

  12. Net.v

  13. Conclusion • After knowing the algorithms, we try to make a good HW/SW Partition • We design the block diagram of Hardware • We try to make a Simulation Model, which can guarantee the Hardware can work

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