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COMP 1321 Digital Infrastructure

Explore the essential instruction set for a CPU and delve into the sequential execution using registers and memory. Learn the components and process of programming a CPU effectively.

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COMP 1321 Digital Infrastructure

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  1. COMP 1321 Digital Infrastructure Richard Henson University of Worcester October2018

  2. Week 4: Programming a CPU – The Fetch-Execute Cycle • Explain the instruction set required for a typical CPU • Understand the sequential way a CPU uses its instruction set to run programs • Understand how registers and memory addresses are used to process a CPU instruction and store the results

  3. Programming a CPU! • Overview: • https://www.youtube.com/watch?v=FZGugFqdr60 • Back to Babbage and Lovelace… • CPU is a machine • machines are stupid • CPU needs instructions it can understand..

  4. 0 1 Instruction Memory Data Memory mar ip 4 The computer so far… (identify & name components)

  5. 0 1 Data Memory 4 A couple of extra registers.. Memory Data Register Instruction Register 1. 2 add ax,bx 2. 8 34 Instruction Memory Data • Energize ax • Energize bx • Select ALU “add" 2 Address 34 • Lineof code goes in… • Electrical bit signals come out

  6. 0 1 2 mar 3 Instruction Memory 4 Moving data into Registers (ie from specified location) mov ax , [1] for example … AX BX mov bx , [2] mov ax , [1] 5 mov bx , [2] 7 8 8 7 6 1

  7. 0 1 2 mar 3 Instruction Memory 4 Moving data into Memory For example … mov [3] , ax mov [0], bx AX BX mov [3] , ax 5 7 mov [0] , bx 7 8 8 7 6 8 1

  8. 8086 CPU family registers • 8086 chip always used a 16-bit word • SAM simulates an 8-bit word • popular on most early microcomputers… • Typical 8086 registers (stores): • general purpose data: AX, BX, CX, DX • specific use e.g. • program counter (PC): instruction address in memory • stack pointer SP): address of the top of the “stack”

  9. Data and Addressing • General purpose register contents… • data • memory address that points to data • Convention: • data written as hexadecimal equivalent • e.g. 4A • memory location also has square brackets • e.g. [4A]

  10. CPU Instructions • Used to tell the CPU what to do… • MOV is for moving data around… • MOV AX, 4A – move “4A” into AX register • MOV AX, [4A] – move data contained in address 4A into AX register • Many other instructions; range of operations… • collectively known as an instruction set • each CPU family has its own unique codes

  11. 8086 in practice • Four 16-bit General Purpose registers • each gen register (e.g. AX) can be read/written to upper (AH) & lower (AL) byte lower byte upper byte AX AL AH BX BL BH CX CH CL DH DL DX

  12. Another 8086 Instruction: ADD • Takes values from two registers • Adds them together • Deposits results back in one of the registers • Which one? • the register that appeared first • e.g. “MOV, AX, BX” puts result in AX

  13. Fetch-Execute Cycle (Organization and Control) 1. Fetch instruction from memory 5. Write back results to registers ax <- ALU add ax , bx 4. Do any Memory Access 2. Decode the instruction and read any registers (Data cache) None needed ALU <- ax ALU <- bx 3. Do any ALU operations (execute units) ax + bx

  14. 0 1 2 3 4 Fetch-Exec : State 1 Instruction Fetch add ax , bx ax bx add AX BX 3 add ax,bx 3 1 8 7 1 9

  15. 0 1 2 3 4 Fetch-Exec : State 2 Decode, Register Operations add ax , bx ax bx add AX BX 3 add ax,bx 3 1 8 7 1 3 1 9

  16. 0 1 2 3 4 Fetch-Exec : State 3 ALU Operation add ax , bx ax bx add AX BX 3 add ax,bx 8 7 1 3 1 4 9

  17. 0 1 2 3 4 Fetch-Exec : State 4 Memory Access add ax , bx ax bx add AX BX 3 add ax,bx 8 7 1 3 1 4 9

  18. 0 1 2 3 4 Fetch-Exec : State 5 Register Write add ax , bx ax bx add BX 3 add ax,bx 4 8 7 1 3 1 4 9

  19. Fetch-Execute Cycle (Organization and Control) 1. Fetch instruction from memory 5. Write back results to registers Data into ax mov ax , [1] 4. Do any Memory Access 2. Decode the instruction and read any registers Read memory at addr ‘1’ Read the ‘1’ 3. Do any ALU operations (execute units) Put ‘1’ into MAR

  20. 0 1 2 3 4 Fetch-Exec : State 1 Instruction Fetch mov ax , [1] mov ax 1 mov ax , [1] 3 8 7 1 9

  21. 0 1 2 3 4 Fetch-Exec : State 2 Decode, Register Operations mov ax , [1] mov ax 1 mov ax , [1] 3 8 7 1 9

  22. 0 1 2 3 4 Fetch-Exec : State 3 ALU Operation mov ax , [1] mov ax 1 mov ax , [1] 3 8 7 1 1 9

  23. 0 1 2 3 4 Fetch-Exec : State 4 Memory Access mov ax , [1] mov ax 1 mov ax , [1] 3 8 8 7 1 1 9

  24. 0 1 2 3 4 Fetch-Exec : State 5 Register Write mov ax , [1] mov ax 1 mov ax , [1] 3 8 8 8 7 1 1 9

  25. 8088: Brains of the IBM PC

  26. Inside the 8088 address bus address adder External buses gen registers ALU

  27. Pentium(8086family) 1 2 • Fetch • Decode • ALU • Mem Ops • Reg Write 3 4 5

  28. IntelMulti-core

  29. Programming a CPU CPU programming code written as assembly language each family has its own instruction set Programming syntax depends on the CPU/instructions how they should be used Intel 8086 assembly language used for CPUs that support PC platforms

  30. Example 8086 Assembly Language MOV AH,08 INT 21 MOV DL,AL MOV AH,02 INT 21 MOV AH,4C INT 21

  31. So THAT’S how it all works!now you try it on SAM…Next week: a focus on writing programs and i/o

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