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2. Outline. System overviewFFT structure and its circuitPerformance and simulation results. 3. OFDM communication system model. 4. . OFDMTransmission: IFFT / FFT. Transmitter: IFFT. Receiver: FFT. . 5. Symbol MappingCircularDifferentialModulator. ComplexMultiplier. Phase Offset Consideration:Differential Modulation / Demodulation.
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1. Analog FFT Interface for Ultra-Low Power Analog Receiver Architectures Nima Sadeghi, Hessam M. Nik
Christian Schlegel, Vincent C. Gaudet
iCORE High Capacity Digital Communication Lab
Department of Electrical & Computer Engineering
University of Alberta
Edmonton, Alberta, Canada
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3. 3 OFDM communication system model
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6. 6 FFT Structure Butterfly Diagram
7. 7 8-bit FFT
8. 8 Weighting factor for 8-bit FFT:
9. 9 Modified 8-bit FFT Butterfly Diagram:
10. 10 256 FFT Weighting Factors:
11. 11 256-FFT
12. 12 The circular view of the Weighting Factorson the unity circle for each FFT stage:
13. 13 Current Mirror: Basic circuit to implement FFT
14. 14 Simulation results for ideal, mismatch modeled, and simplified 256FFT
15. 15 Conclusion & future work System-level integration of analog decoders
Energy scavenging methods based on the power consumption advantages of analog decoders
Decoder decreased the performance loss due to the circuit mismatch.
Implementation of 256-FFT in CMOS
technology
16. 16
Thank you,
Questions?
17. 17 References [1] C. Winstead, Analog Iterative Error Control Decoders?, Doctor of Philosophythesis, Dept. of Elec. &Comp. Eng., Universityof Alberta, 2004.
[2] J.G. Proakis, Wiley Encyclopediaof Telecommunications.,Vol. 4, John Wiley&sonsInc., NewJersey, 2003.
[3] A. V. Oppenheim, R. W. Schafer andJ. R. BuckDiscrete-timesignal processing, 2nded., Prentice-Hall Inc., NewJersey, 1999.
[4] S. Liu, Kramer, Indiveri, Delbruck, and Douglas. Analogvlsi:Circuits andprinciples., TheMITPress, Cambridge, Massachusetts, 2002.
[5] J.G. Proakis, Digital Communications, 4thed., McGraw-Hill, NewYork, NY, 2001.