Variation Aware Application Scheduling in Multi-core Systems

1. Variation Aware Application Scheduling in Multi-core Systems Lavanya Subramanian, Aman Kumar Carnegie Mellon University {lsubrama, amank}@andrew.cmu.edu Website: http://www.cs.cmu.edu/~amank/

2. Document Map • Problem Statement • Milestones • Overview of Project • Static Profiling • Variation Map Construction • Variability incorporation in BLESS • Results

3. Problem Statement (Aide-mémoire) • The perspective of a chip multi processor being a homogenous set of cores is not a practical one. • A CMP has to be relooked as: • a collection of heterogeneous cores • each core operating at different frequency • each core with a different power profile

4. Milestones • Milestone 1.1: • Building variability information into the CMP simulator. • Static profiling of applications. • Milestone 2: • Building a scheduler into the CMP simulator. • Milestone 3: • Implementing and analyzing the proposed scheme against the baseline algorithms.

5. The Lock Stock and Barrel

6. Static Profiling • Simulate SPEC 2000 benchmarks on Wattch/Sim-GALS • Extract • Memory instruction dynamic power per instruction • Non-memory instruction dynamic power per instruction • Core average leakage power per cycle Power Model

7. Static profiling (Results) Tech: 45 nm Sim GALS

8. Variation Map Construction • Generate Leff variation map from Varimap tool • Calculate Leakage Variation • Based on Leff variation using SPICE and MATLAB • Calculate Frequency Variation (Base : 3GHz) • Based on Leff variation using MATLAB Tech: 45 nm Frequency Model (Built-in Variations) Power Model (Built-in Variations)

9. Variability per CORE • Read the Frequency/Leakage maps in BLESS • Compute Power/Performance based on Variability information Frequency Model (Built-in Variations) C1 C2 C3 C4 C1 C2 C3 C4 C5 C6 C7 C8 C5 C6 C7 C8 Power Model (Built-in Variations) C9 C10 C11 C12 C9 C10 C11 C12 C13 C14 C15 C16 C13 C14 C15 C16

10. Variability per CORE (Results) • Same Application on 16 Processors • 4 Applications on 16 Processors

11. The Lock Stock and Barrel

12. Questions