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ATLAS Upgrade R&D and Plans

This document outlines the upgrade plans for the SLAC ATLAS program, including the perspective on the superLHC upgrade and the tracking upgrade activities. It also discusses the collaborative effort between LBNL, SLAC, and Santa Cruz, and the specific focus on the Pixel Insertable B-Layer (IBL) project.

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ATLAS Upgrade R&D and Plans

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  1. ATLAS Upgrade R&D and Plans Su Dong DOE proton review: SLAC ATLAS program Washington DC June 11, 2009 The SLAC ATLAS Program: Upgrade R&D The SLAC ATLAS Program: Upgrade R&D Page 1

  2. Peak Luminosity Phase 2 Phase 2 Phase 1 Phase 1 2009 2015 2020 2009 2015 2020 LHC Luminosity Upgrade Road Map Integrated Luminosity 5 ab-1 1x1035 3x1034 700 fb-1 June 11, 2009 The SLAC ATLAS Program: Upgrade R&D The SLAC ATLAS Program: Upgrade R&D Page 2

  3. Perspective on superLHC Upgrade • superLHC may be an inevitable path for HEP: • Early discoveries would imply the effective extra energy reach at high lumi could uncover additional new particles. • If early phase of LHC not revealing new physics, it would be hard to argue for other new facilities. The effective additional energy reach of sLHC will be of central focus. • The upgrade activities at SLAC will be a key addition to better utilize the SLAC resources and expertise to complement current ATLAS efforts, as an integral buildup of the energy frontier effort. • sLHC detector design has unprecedented challenges: • Intense radiation: ~2x1016 particles/cm2 (10yr@1035) at R=4cm • Dramatic pileup background: ~400 interactions/crossing Need long lead time for R&D and construction. June 11, 2009 The SLAC ATLAS Program: Upgrade R&D The SLAC ATLAS Program: Upgrade R&D Page 3

  4. SLAC Tracking Upgrade Activities • Phase 1: Pixel Insertable B-Layer (IBL) project • Phase 2 (but some may become phase 1): • Pixel upgrade 3D sensors • Tracking upgrade mechanical designs • Pixel upgrade data transmission and stave electrical design • Silicon strip detector barrel stave electrical design • Tracking upgrade test stand and DAQ Leverage on past silicon experience from SLD (pixel), MK-II, GLAST, while explore synergy with future silicon detector design of SiD for ILC. Scientific staff: Mark Convery, Matt Graham, Philippe Grenier, Per Hansson, Jasmine Hasi, Paul Jackson, Chris Kenney, Peter Kim, Martin Kocian, David MacFarlane, Rich Partridge, Su Dong, Bill Wisniewski, Charles Young Technical staff: Karl Bouldin, Jim McDonald, David Nelson, Marco Oriunno, Matthias Wittgen June 11, 2009 The SLAC ATLAS Program: Upgrade R&D The SLAC ATLAS Program: Upgrade R&D Page 4

  5. Collaborative Effort on Upgrade • Close collaboration between LBNL, SLAC, Santa Cruz has supplied a strong force in the global ATLAS tracking upgrade. Coordinated activities: • Regular ~monthly meeting at SLAC • Several upgrade workshops hosted at the 3 institutions • Collective input for global ATLAS upgrade events • Global ATLAS Connections • Regular contributor to IBL working group meetings • Many presentations at various ATLAS upgrade workshops • ATLAS task force participation • Pixel b-layer replacement task force 2008 (Su Dong) • ATLAS tracker upgrade layout task force 2009 (Charles Young) June 11, 2009 The SLAC ATLAS Program: Upgrade R&D The SLAC ATLAS Program: Upgrade R&D Page 5

  6. Pixel Insertable B-Layer (IBL) • Before superLHC, pixel b-layer is expected to reach its radiation dose limit by ~300fb-1 (equivalent to 2 years @1x1034). • Cannot do simple b-layer replacement with <9 months shutdown. Plan is to insert a new b-layer inside present detector during the shutdown for phase-1 (2015). • SLAC activities: • Main contributor on inner service design studies • Stave electrical design studies and data transmission tests • 3D silicon sensor R&D as candidate sensor for IBL • Beyond baseline Read Out Driver upgrade option • Overall IBL design option performance evaluation June 11, 2009 The SLAC ATLAS Program: Upgrade R&D The SLAC ATLAS Program: Upgrade R&D Page 6

  7. 3.6cm 4.6cm 3650 mm 700 mm Pixel Insertable B-layer (IBL) June 11, 2009 The SLAC ATLAS Program: Upgrade R&D The SLAC ATLAS Program: Upgrade R&D Page 7

  8. sLHC Tracker Upgrade: Introduction All silicon upgrade inner detector replacing current pixel+SCT+TRT • Inner most pixel layer(s) need new sensor technology • New approaches to cooling, power deliver, data transmission and still trying to reduce material budget. (SLAC study of the layout geometry) June 11, 2009 The SLAC ATLAS Program: Upgrade R&D The SLAC ATLAS Program: Upgrade R&D Page 8

  9. Pixel Upgrade: 3D Silicon Sensor • 3D Sensor technology pioneered by Sherwood Parker et al is a primary candidate for inner most pixel layer(s): • Radiation hardness • Active Edge • The 3D R&D devices originated at the Stanford Nano-fabrication Facilities. Two members of the original team are now with SLAC. • SLAC/Stanford activities: • Remaining device R&D and assisting industrialized production. • Proton irradiation at LANL. • CERN test beam participation. • Integration of 3D sensor with ATLAS readout. Test stand preparation and beam test DAQ improvements. June 11, 2009 The SLAC ATLAS Program: Upgrade R&D The SLAC ATLAS Program: Upgrade R&D Page 9

  10. Pixel Upgrade: 3D Silicon Sensor Active Edge 3D sensor from SNF micro Carrierboard LANL Aug/09 proton irradiation preparation 800 MeV proton beam sensor FE June 11, 2009 The SLAC ATLAS Program: Upgrade R&D The SLAC ATLAS Program: Upgrade R&D Page 10

  11. Tracker Upgrade: CO2 Cooling • Cooling becomes a central focus for the larger and higher granularity silicon system for sLHC with bigger challenge to avoid thermal runaway. • CO2 cooling is widely perceived as a better alternative to the current C3F8 cooling system. High latent heat and high vapor pressure allow efficient heat transfer with smaller pipes for reduced material. Also a more environment friendly solution. • Despite the priority and broad interests, very little has been done on CO2 cooling in HEP. More practical for a national lab. • SLAC activities: • Already operating a blown system for mechanical prototype tests • Design of closed loop system under way to establish a major cooling test site up to stave level • Intend to engage in the design of overall tracker cooling system • Extend into pixel mechanical design involvement June 11, 2009 The SLAC ATLAS Program: Upgrade R&D The SLAC ATLAS Program: Upgrade R&D Page 11

  12. Tracker Upgrade: CO2 Cooling June 11, 2009 The SLAC ATLAS Program: Upgrade R&D The SLAC ATLAS Program: Upgrade R&D Page 12

  13. Tracker Upgrade: Data Transmission • The high hit density and high radiation at sLHC poses new challenges to data transmission. • Current pixel optical data transmission elements will not survive sLHC radiation dose, and even more difficult to work at the colder operating temperature of -300C expected from CO2 cooling. • SLAC is leading the unique alternative technology R&D with multi-Gb/s electrical transmission over microCoax cables. • Custom made twinax cable with optimized material choices for transmission performance, radiation hardness and minimize material budget. June 11, 2009 The SLAC ATLAS Program: Upgrade R&D The SLAC ATLAS Program: Upgrade R&D Page 13

  14. Tracker Upgrade: Data Transmission Gb/s electrical transmission with microCoax: CML protocol, using pre-emphasis and encoding techniques. Custom twinax cable: • Al wires and shield • Polyethylene dielectric Raw With Pre- emphasis Pre-emphasis demo with LAr kapton cable @ ~1Ghz Twinax bit error tests: 6 Gbit/s over 6m error free. Irradiation test and integration with GBT in preparation. 2mm June 11, 2009 The SLAC ATLAS Program: Upgrade R&D The SLAC ATLAS Program: Upgrade R&D Page 14

  15. Other Tracker Upgrade Activities • Si Strip stave electrical design and tests • Extensive technical contribution to electrical stave debugging and improved design. • Stave DAQ Buffer Control Chip jointly designed by UCL/SLAC and fabricated by SLAC. • High Speed I/O board originally designed for SLAC LCLS is adopted as stave test stand DAQ board. • Upgrade pixel test stand with multi-channel readout for stave level tests and test beam, using generic DAQ platform (see next topic). • Upgrade tracker layout study and simulation (see Charlie Young’s talk). June 11, 2009 The SLAC ATLAS Program: Upgrade R&D The SLAC ATLAS Program: Upgrade R&D Page 15

  16. SLAC Trigger/DAQ Upgrade Activities • The challenge of increasing data volume and trigger rates with luminosity is formidable. Trigger/DAQ upgrades/improvements are inevitable for ATLAS like every other experiment, but the detailed plans are far from clear. • One major R&D development path towards significantly improved DAQ readout architecture and bandwidth originated from SLAC. • Additional trigger upgrade activities also expected. • Scientific staff:Rainer Bartoldus, Martin Kocian, Andy Haas, Su Dong • Technical staff: Ric Claus, Gunther Haller, Mike Huffer, Jim Panetta, • Andy Salnikov, Matthias Wittgen June 11, 2009 The SLAC ATLAS Program: Upgrade R&D The SLAC ATLAS Program: Upgrade R&D Page 16

  17. DAQ Upgrade: Readout System • Current Read Out Drivers (ROD) have 7 different flavors for different subsystems and they cannot last 10 years. • The current ROS PC hosting custom-build ROBIN cards via PCI bus is close to performance limit for phase 1 luminosity. • The current Read Out Link (ROL) restricts bandwidth sharing, sensitive to fluctuations and limits L1 rate to <100Khz . 836 ROD 1574 ROL 145 ROS from frontend ROL (S-link) BOC ROD ROBIN PC 132MB/s P C I BOC ROD ROBIN ROBIN V M E 132MB/s BOC ROD … 100-1200MB/s 160MB/s ROBIN ethernet … … … ROS up to 6 ROBINs/ROS 132MB/s SBC ethernet Present system 40MB/s June 11, 2009 The SLAC ATLAS Program: Upgrade R&D The SLAC ATLAS Program: Upgrade R&D Page 17

  18. Processor 450 MHZ PPC-405 RCE board data instruction Boot Options Memory Subsystem Configuration 512 MByte RLD-II 128 MByte Flash Data Exchange Interface (DEI) ATCA crate with RCE & CIM DAQ Upgrade: ATCA based RCE Development • Generic high performance DAQ research at SLAC: Reconfigurable Cluster Element (RCE) concept on ATCA platform • Well advanced R&D serving many other SLAC projects already: Peta-cache, LCLS, LSST RCE board An RCE ATCA crate with RCE & CIM Combinatoric logic MGTs DSP tiles June 11, 2009 The SLAC ATLAS Program: Upgrade R&D The SLAC ATLAS Program: Upgrade R&D Page 18

  19. DAQ Upgrade: New Readout Concept • A possible new architecture with ATCA based RCEs and CIMs as building block with ROD and ROS merged into ROMs with 12 RCEs/ROM. • High bandwidth communication capacity between modules (1 GB/s between each pair) offers ideal platform for other use: • Level 1.5 triggers • L2 supervisor + ROI builder (ANL) • Pixel upgrade example: • Detector area ~2x current • Data rate ~18xcurrent • sLHC pixel has ~800x 3.2Gbps • 800/48 => 17 ROMs • (c.f. present 132 RODs+12 ROSes) Up to 12 ROMs per crate from frontend RTM ROM RTM ROM 48 x 3.2gb/s fibers/ROM A T C A RTM ROM … … … Possible upgrade architecture 24 GB/s per crate => 2 GB/s per ROM Shared bandwidth Less sensitive to local fluctuations CIM Dual star point-point Up to 4GB/s per slot ethernet The SLAC ATLAS Program: Upgrade R&D

  20. DAQ Upgrade: New Readout Concept • The RCE + CIM concept was presented at Feb/09 ATLAS upgrade week and Mar/09 ATLAS/CMS Electronics for sLHC workshop in 4 talks. • Significant interests from ROD developers from many subsystems with a common goal of exploring new ROD designs using the RCE development platform. The willingness to maximize commonality is very encouraging. • SLAC is organizing an RCE training workshop at CERN Jun/15-16 in conjunction with the ATLAS ROD upgrade workshop in the same week. • RCE test stand established at CERN for joint development (+limited distribution to institutions). • Collaborating communication via atlas-highlumi-REC-development e-group. June 11, 2009 The SLAC ATLAS Program: Upgrade R&D The SLAC ATLAS Program: Upgrade R&D Page 20

  21. Synergy between Projects The choice of projects had the efficient use of lab resource in mind to best utilize our expertise and aim for broader applications: • CO2 cooling, data transmission, teststand/DAQ are relevant for both strip and pixel detectors. • Teststand/DAQ, Gb/s transmission, Trigger/DAQ upgrade are based on electronics the general Trigger/DAQ experience. • We believe in the need to open up L1 bandwidth and working on the two key enabling aspects: tracker data transmission and DAQ upgrade. June 11, 2009 The SLAC ATLAS Program: Upgrade R&D The SLAC ATLAS Program: Upgrade R&D Page 21

  22. Summary and Outlook • We have identified many interesting directions making significant contributions to the ATLAS upgrades and started some detailed R&D and design. • We believe these directions speak to the real needs to complement existing upgrade effort. • There are strong synergies among the investigated projects to maximize utilization of SLAC expertise. • We intend to keep the broad vision of the overall ATLAS upgrade needs and pay attention to system design issues. We believe SLAC can play a major role in the ATLAS upgrade. June 11, 2009 The SLAC ATLAS Program: Upgrade R&D The SLAC ATLAS Program: Upgrade R&D Page 22

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