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Project Bushtit An Interface between Radio Telemetry and Wireless Communication February Review

Project Bushtit An Interface between Radio Telemetry and Wireless Communication February Review. Joseph Madson Chun-Chang Chiu Jonathan Clark Sara Sundborg. Overview. Review of Project Accomplishments Option 1 Code Completed Interrupt Programming Completed

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Project Bushtit An Interface between Radio Telemetry and Wireless Communication February Review

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  1. Project BushtitAn Interface between Radio Telemetry and Wireless CommunicationFebruary Review Joseph Madson Chun-Chang Chiu Jonathan Clark Sara Sundborg University of Portland School of Engineering

  2. Overview • Review of Project • Accomplishments • Option 1 Code Completed • Interrupt Programming Completed • Received Microcontroller parts and book • Plans • Issues • Milestones • Conclusion University of Portland School of Engineering

  3. Block Diagram: Hardware Description ROM HQ ROM Communications 1 2 3 B Bushtit Interface PIC18F452 Microcontroller On/off EM5R R B 1 2 3 RS-232 Interface Chip RM1 Decagon Inc. University of Portland School of Engineering

  4. Accomplishments • TOP’s V1.0 Approved • Option 1 Completed • Computer Connected to Internet • Part Received • PIC18F452 Microcontroller • Two3M ACE board Model 327 • 3M Breadboard Jumper Wire Kit • Microchip ICD Module • Ten Panasonic Red Clear T-1 3.0 LED • Microcontroller Book • Design Implementation Completed • Initial Interrupt Programming • Memory Allocation Scheme University of Portland School of Engineering

  5. Initial 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Transmit Receive Int 3 Int 1 Int 2 Block Diagram: Memory Allocation Block Diagram: Interrupt Priorities 0 Bytes In/Out Main loop ASCII signal (RM1) DSP Options/Error Checking/DSP Delete above memory block at first non-ASCII memory location Non-ASCII numbers Battery Error Checking 45 Bytes University of Portland School of Engineering

  6. Plans • Start Debugging PIC18F542 • Subroutine Implementation • Debug Memory Allocation • Debug Interrupt Priorities • Finish Option 2 & 3 • Finish Error Checking University of Portland School of Engineering

  7. Issues • Reorder Demonstration Kit for the Microcontroller PIC18F542 • Finish Debugging • Testing with ROM equipment questionable University of Portland School of Engineering

  8. Milestones University of Portland School of Engineering

  9. Conclusions • Received All Parts except Demonstration Kit • Finished Option 1 • Finished Interrupt (debug) • Finished Memory Allocation (debug) University of Portland School of Engineering

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