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Memory Technology and Interfacing. Stored Program Model. Input. Memory. CPU. Output. Stored-program computer model. Types of Memory. Random-Access Memory (RAM) Volatile Store data or programs that can be conveniently reloaded Read-Only Memory (ROM) Non-volatile
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Stored Program Model Input Memory CPU Output Stored-program computer model
Types of Memory • Random-Access Memory (RAM) • Volatile • Store data or programs that can be conveniently reloaded • Read-Only Memory (ROM) • Non-volatile • Programming once store essential programs
Random-Access Memory (RAM) • Any of its contents may be accessed at any time. (Why this notation is used?) • Two technologies are used: • Static RAM (SRAM) • Dynamic RAM (DRAM)
Static RAM • A static RAM stores a bit of information within a flip-flop. word bit bit 6-Transistor SRAM Cell
row select bit Dynamic RAM • A DRAM stores a bit of information as a charge.
DRAM vs SRAM • DRAM is much higher density (less transistor is used for a cell). • DRAM needs to be refreshed every now and then (to prevent memory loss). • Must incorporate with extra (complicated) circuit for refreshing.
ROM Technologies • Pure ROM • PROM (User-Programmable ROM) • EPROM (Erasable PROM) • EAROM (Electrically-Alterable ROM)
Pure ROM • A mask-programmed ROM made from manufacturer. • High cost – need to be produced for large volumes.
PROM • Can be programmed (once) by user. • Using PROM programmer. • It’s a fusible-link PROM each cell is fuse (nichrome or polysilicon). • Originally, all rows and columns are connected (logical 0s). • Once a cell is ‘burnt’, it becomes logical 1. • “Grow back” problem reliability problem. • Once programmed, it can not be altered ever again.
EPROM • Can be reprogrammed a number of times using a programmer machine. • Two main types: • UV-erasable • Electrically-erasable
EAROM • Can be read from and written to. • It actually is non-volatile RAM. • Now, we use Flash Memory
Accessing Memory • There must be a control bus for the following operations: • Read data from memory • Write data to memory • Do not access memory
Memory Interfacing Design & Memory Map 20=1 21=2 22=4 23=8 24=16 25=32 26=64 27=128 28=256 29=512 210=1024 211=2048 212=4096 213=8192 214=16384 215=32768 216=65536 0000h 4K 0FFFh 1000h 4K 1FFFh 2000h 4K 2FFFh E000h 4K EFFFh F000h 4K EFFFh