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Multiple Banked Register Files

Multiple Banked Register Files. hamzeh doostie. Main Topics. What are Registers? What are Register Files? What are Multiple Banked Register Files? Comparison of Arm VS x86 Architecture. What are Registers?.

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Multiple Banked Register Files

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  1. Multiple Banked Register Files hamzeh doostie

  2. Main Topics • What are Registers? • What are Register Files? • What are Multiple Banked Register Files? • Comparison of Arm VS x86 Architecture

  3. What are Registers? • A register is a small amount of storage available on the CPU whose contents can be accessed more quickly than storage available elsewhere (such as main memory) • They are the fastest way for the CPU to access data, since the CPU doesn’t have to utilize the address bus to get data from main memory • Standard computers today come with processors that use the x86 architecture, using 32-bit registers for data and only a few register files

  4. Layout of CPU and Memory

  5. What are Register Files? • Register Files are basically arrays of specific registers • On standard x86 architecture, the 8 general purpose registers (often used in assembly programming) would be one register file.

  6. Multiple Banked Register Files • Overview • Multiple Banked Register Files lessen the burden on the CPU by not having it access main memory as much and instead accessing various register files. Accessing Main memory is a huge cost of speed for the CPU. In fact it is roughly 140 times more costly for the CPU to access main memory through the bus as opposed to accessing registers. • In each clock cycle of the CPU it can only handle one program’s instructions at a time

  7. Multiple Banked Register Files • In a multi-process Operating System, a huge amount of processes and user applications can be running simultaneously. On x86 architecture (like in the laptops on some of your desks at this very moment), handling multiple processes is dealt with inefficiently by the CPU. • For example lets say you are running Firefox and Chrome simultaneously on your computer. On x86 architecture the CPU will “alternate” between the two applications and will have to constantly access main memory in each cycle.

  8. x86 Architecture

  9. So Why are MBRFs so Crucial? • Multiple Banked Register Files are crucial because they allow multiple programs’ and processes’ data to remain in registers, not being pushed back into main memory after execution, thus saving a tremendous amount of CPU time and making execution of multiple processes exponentially faster. • The more multiple banked register files there are for the system, the less main memory will have to be accessed through the data bus by the CPU, so processes’ data will remain close to the CPU ready for immediate execution at any time.

  10. Analogy for MBRF’s Imagine having many arms rather than just two. If you have to perform many different tasks at the same time, having more arms will allow you to keep idle tasks in arms while you complete another task. However if you only have two arms, you will constantly have to keep putting tasks down on the ground and picking them up later to finish them.

  11. Multiple Banked Registers in x86 • x86 architecture has 3 register files by default. • There are some patents out on the market to integrate more register files into x86 processors increasing performance significantly • One group has put together a “Shadow Register File Architecture” to integrate into x86

  12. Current Register Files in x86 RF1 RF2 RF3 Extra Registers

  13. Multiple Banked Registers in x86 • Terms • Context Switching: when the processor switches between various programs and processes running (register values of the current process are pushed back into main memory and new data from a different process is fetched from memory). • Scheduler: the way processes are assigned priorities (to the processor) in a priority queue. Keeps the CPU as busy as possible. Selects from among the processes in memory that are ready to execute, and allocates the CPU to one of them

  14. Multiple Banked Registers in x86 The Shadow Update Unit saves the register contents of the previous process to a cache or main memory and loads the register contents of the next process from memory. This relieves the processor of explicitly loading the register values. This makes context switching much faster. So the SUU essentially does the “fetching” step for the CPU, yet it also saves the register values of the current process. This makes the scheduler more efficient since, since the registers will be clear and immediately ready for the data of the next process.

  15. ARM Architecture What is ARM architecture? • The most widely used 32-bit processor architecture today • Used primarily in Embedded Systems such as PDAs, iPods, Gaming Systems • It is critical in Embedded Systems to make the most use out of memory and this is why ARM is used over x86 • Along with other reasons ARM was created with the idea of Multiple Banked Register Files in mind, thus making it ideal for Embedded Systems.

  16. ARM Architecture

  17. ARM Architecture ARM Multiple Banked Register Files • User (usr): Normal program execution state • FIQ (fiq): Data transfer state (fast irq, DMA-type transfer) • IRQ (iqr): Used for general interrupt services • Supervisor (svc): Protected mode for operating system support • Abort mode (abt): Selected when data or instruction fetch is aborted • Undefined (und): Selected when undefined instruction is fetched

  18. Citations http://www.hipc.org/hipc2002/2002Posters/ShadowRegister.pdfhttp://www.princeton.edu/~rblee/ELE572Papers/MultiBankRegFile_ISCA2000.pdfhttp://www.freepatentsonline.com/5513363.htmlhttp://ieeexplore.ieee.org/Xplore/login.jsp?url=/iel5/8578/27165/01206989.pdf?arnumber=1206989http://en.wikipedia.org/wiki/Register_filehttp://www2.computer.org/portal/web/csdl/doi/10.1109/ISCA.2000.854401https://eprints.kfupm.edu.sa/20766/1/20766.pdf

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