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EE 440 LOGIC CIRCUITS I Proteus Section

EE 440 LOGIC CIRCUITS I Proteus Section. Experiment 5 “Labels and Sub-circuits: Application to 4-bit Parallel Adder” Prepared By: Güray GÜRKAN, Ph.D. Half/Full Adders. Full Adder Part. Half Adder Part. Full Adder Circuit: “1 bit”. Full Adder consists of 2 Half Adders and an OR Gate.

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EE 440 LOGIC CIRCUITS I Proteus Section

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  1. EE 440 LOGIC CIRCUITS I Proteus Section Experiment 5 “Labels and Sub-circuits:Application to 4-bit Parallel Adder” Prepared By: Güray GÜRKAN, Ph.D.

  2. Half/Full Adders Full Adder Part Half Adder Part

  3. Full Adder Circuit: “1 bit” Full Adder consists of 2 Half Adders and an OR Gate HALF ADDER HALF ADDER

  4. Full Adder Circuit: “1 bit” X Full Adder S Y C Out C In

  5. Previous Experiment: 4 bit Parallel Adder x0 x1 x3 PARALLELADDER X 4-bits s0 s1 s3 S 4-bits y0 y1 y3 Y4-bits

  6. Previous Experiment: 4 bit Parallel Adder

  7. Previous Experiment: 4 bit Parallel Adder * It is easier to draw circuit by using Full AdderBlocks X0 y0 S0 S1 S0 C1 HA FA X1 y1 S1 C2 FA S2 X2 y2 S2 C3 S3 C4=S4 FA x3 y3

  8. Full Adder Block Now, build this circuit

  9. Adding “Labels” These are Input and Output Labels How to place them?

  10. Adding “Labels” Terminals

  11. Adding “Labels” Input Output

  12. Adding “Labels” X S Y C_Out C_In Terminal names: Edit Properties as shown

  13. Adding “Subcircuit” Subcircuit MODE

  14. Adding “Subcircuit” Draw a 9x9 Square

  15. Adding “Subcircuit”

  16. Adding “Subcircuit” Paste the circuit to empty sheet

  17. Adding “Subcircuit”

  18. Adding “Subcircuit” Delete the copied circuit What do we need now??? 3 InputsX, Y, C_In 2 OutputsS, C_Out

  19. Adding “Subcircuit” Same as TERMINALS MODE

  20. Adding “Subcircuit” INPUTS are on the left OUTPUTS are on the right Try to build PORTS as shown

  21. TESTING the “Subcircuit” LOGICSTATEs LOGICPROBE (BIG)

  22. FULL ADDER BLOCK is COMPLETED  WHAT IS NEXT??

  23. X0 y0 S0 S1 S0 C1 HA FA X1 y1 S1 C2 FA S2 X2 y2 S2 C3 S3 C4=S4 FA x3 y3

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