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Status of Pile-up Task (CMS). C. Civinini , L. Silvestris and A. Tricomi INFN. Aida WP2 – INFN contribution. Our contribution to WP2: Development of a toolkit to handle high multiplicity events for track reconstruction
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Status ofPile-up Task (CMS) C. Civinini, L. Silvestris and A. TricomiINFN AIDA-WP2 Meeting
Aida WP2 – INFN contribution • Our contribution to WP2: • Development of a toolkit to handle high multiplicity events for track reconstruction • Pile up in SLHC will increase a factor of 10-20 higher with respect to ‘nominal’ LHC more efficient way needed to manage high particle mutiplicity events, expecially in pattern recognition for tracking • We are working on improving CMS Tracking for Phase 1 upgrade AIDA-WP2 Meeting
Seeding starts from innermost pixel layers. Inside-out trajectory building ? ? Iterative tracking with hits-removal (6 iterations like this) CMS Tracking in a nutshell Final fit using Kalman Filter/Smoother. Parameters propagated through magnetic field inhomogeneities using Runge-Kutta propagator Track Parameters (q/p,eta,phi,dz,d0) AIDA-WP2 Meeting
CMSW Performance: Event Reconstruction # PileUp Timing based on MC Track reconstruction accounts for ~ 40-50% total CPU time Next to leading contributors: Particle Flow, conversions, Muon ID AIDA-WP2 Meeting
Current activities • CMS-Phase 1 upgrade geometry in CMSSW • New Pixel system • 4 barrel layers + 2*3 endcap disks • Material budget check • Very important for reliable simulation on tracking, b-tag,… • Performance studies of current tracking SW up to 100 PU events (approx. 5xLHC nominal Luminosity) • Identify most offending modules in terms of CPU and memory • Identify most offending data formats (Data Tier reduction) AIDA-WP2 Meeting
CMS Pixel @ Phase I • Current system designed to withstand L ∼200-300 fb-1 • Significant radiation damage @ L>1034cm-2s-1 • 1st layer - 16% inefficient @ 2x1034cm-2s-1 Current pixel system: 3 barrel layers 2 endcap disks old2new Module Thinner sensor 285μm to 225μm Thinner ROC 175μm to 75μm No HV capacitor Minimise SMD components Micro-twisted pair No base strips ONE TYPE ONLY Add 4th layer r = 39, 68, 109 & 160 mm Add 3rd disc Aggressive material reduction AIDA-WP2 Meeting
CMSSW Phase1 new Geometry displaced ladder m-twistedcables modules Colingpipes First BarrelLayer 16 facesversion CF-Strips displaced ladder AIDA-WP2 Meeting
BPIX Module Hybrid Mountingstrips (layers 0-1 only, stillclamps forlayers 2-3) TBM Read-out chip (ROC) Capacitorstrips C. Civinini - Upgrade Simulations and Physics
CMS Tracking software performance studies • Iterative tracking optimization • Different seeding strategies to selectively clean-up the hits • Overall CPU and memory reduced • …how this apply to SLHC tracking studies • Iterative steps reduced for high pile-up environment • New seeding with the new pixel system • Performance optimization AIDA-WP2 Meeting
Tracking Software for Offline • Kevin Stenson’s proposed modified tracking steps for reducing CPU time (29 July talk): Pixel Upgrade Workshop Alessia Tricomi
Tracking Software for Offline From Kevin Stenson’s 29 July talk: Timing and memory are reduced significantly. CPU time is still non- linear Memory increase is still significant Pixel Upgrade Workshop Alessia Tricomi
New Upgrade Tracking Code • New Iterative tracking for upgrade studies • Backported new iterative tracking from 440_pre6 (H. Cheung with help from K. Stenson and P. Jindal) • copyless clustering to avoid making copies of clusters for the start of each iterative tracking step. • new track collection merging and quality assignment code that avoids some copies and can merge more than two collections at a time • do triplet hit comparitor to avoid making and storing useless pixel triplets • merge trajectories after every 1000 seeds rather than waiting until all seeds are used (batch cleaning) • Only step 0 + step 1 used so far for upgrade studies • Step 0: quadruplet (Phase I) – triplet (StdGeo) • Step 1: change in seeding layers wrt official new iterative code • Still tuning for high PU needed • Lower pT cu in 440_pre6 - maybe too low for us? • No TEC info for seeding (too much memory) reduce eff at high eta – how to recover efficiency managing memory use? • Use other iterative step? Add mixed Triplet step Pixel Upgrade Workshop Alessia Tricomi
New Upgrade Tracking Code • New recipe to reduce CPU/Memory usage released 3 days ago • Backported new iterative tracking from 440_pre6 (H. Cheung with help from K. Stenson and P. Jindal) • New code to speed up TrackingTruthProducer (W. Sun) • Change to the code that matches SimTracks to SimVertexes, by binning the vertices according to radius to reduce the search window for each track. • Faster quadruplet seed (triplet merging) code (j. Olzem – M. Aldaya) • Calculates f and h of the input triplets and rejects those pairs with Dh > 0.05 or Df > 0.15. • Change to a PF routine to reduce unneeded iterations in a loop (I. Reid) • Change to use templates for the stdgeom errors (but the rest is the same as phase 1), as we were using very outdated errors from the DB (F. Giordano) • A factor 4 improvement in CPU performance and just 3 of out 500 jobs with 20 events/job failed due to a 3GB limit with MTV fullreco Pixel Upgrade Workshop Alessia Tricomi
Tracking performance @ high Pile-up:Memory usage AIDA-WP2 Meeting
Tracking performance @ high Pile-up:Memory usage AIDA-WP2 Meeting
Future activites • Aug 2011 – Jan 2012 • modify and improve critical modules identified in Phase I • improved modules will be integrated and validated in the current CMSSW • Feb 2012 – Jul 2012 • Identify components that need to be redesigned • Prioritize list of components to be redesigned • Start the iterative redesign procedure for each component according to the priority list • From Aug 2012 - for each component the following step will be done • Prototype • Integration into the CMSSW • Validation of the Physics performance AIDA-WP2 Meeting
CMS @ Phase I • Pixel System replacement: • radiation damage • data loss at full trigger rate • Hadron Calorimeter improvement: • add depth segmentation • new high gain photodetectors • new fast electronics • Muon detector improvement: • add redundancy in endcap region • improve Trigger primitives • Trigger improvement: • calo trigger- improve clustering & iso • muon trigger- more coverage/inputs Technical Proposal for Upgrade submitted at LHCC • DAQ improvement: • bandwidth x 2-5 AIDA-WP2 Meeting
CMS Pixel @ Phase I (cont’d) Aggressive material reduction: CO2 cooling, cables, PCB flange,... and new layout (still in progress...) → improved performances Preliminary Preliminary AIDA-WP2 Meeting