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ECE 447: Lecture 2. Internal Input/Output Devices (I/O Subsystems). RAM. CPU. ROM. EEPROM. A/D. SPI. TIMER. SCI. 8 (4). 8. 4. 2. PORT A. PORT B. PORT C. PORT D. PORT E. 3. 3. 2. 8. 8. 6. 8 (4). ECE 447: Organization of MC68HC11. ECE 447: Acronyms Used.
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ECE 447: Lecture 2 Internal Input/Output Devices (I/O Subsystems)
RAM CPU ROM EEPROM A/D SPI TIMER SCI 8 (4) 8 4 2 PORT A PORT B PORT C PORT D PORT E 3 3 2 8 8 6 8 (4) ECE 447: Organization of MC68HC11
ECE 447: Acronyms Used • CPU - Central Processing Unit := ALU (Arithmetic Logic Unit) + Control • RAM - Random Access Memory := Read/Write Memory • ROM - Read Only Memory (non-volatile) • EPROM - Erasable Programmable ROM • EEPROM - Electrically Erasable ROM • SCI - Serial Communication Interface (asynchronous serial communication interface) • SPI - Serial Peripheral Interface (synchronous serial communication interface) • A/D - analogue-to-digital converter
Input Pins Output Pins Bidirectional Pins Shared Functions Port Port A Port B Port C Port D Port E 3 – – – 8 3 8 – – – 2 – 8 6 – Timer High Order Address Low Order Address and Data Bus SCI and SPI A/D Converter ECE 447: Input/Output Ports
ADC VRH 6 V 10010010 10010011 > 2.5 V 10010011 10010100 VRL 0 V • successive approximation • minimum 4 conversions • single-channel or four-channel conversions • one-time or continuous conversions ECE 447: A/D Converter
Generating delays - imposing a specific delay between two points in the program by polling. label 1 instr1 instr2 delay instrN label2 2. Pulse accumulation - counting the number of pulses ECE 447: 68HC11 Timer System
3. Input capture - measuring the time between signal edges start stop stop start 4. Output compare - generating signals with the given timing characteristics single pulse periodical signal pulse width period ECE 447: 68HC11 Timer System
5. Real Time Interrupt – Produce a period signal to the 68HC11. period ECE 447: 68HC11 Timer System The Real Time Interrupt will allow a piece of code to be executed at a given period. This can be used to implement a Real-Time clock.
I/O device Control registers instructions address1/name1 ….. Status registers status of the device ….. . . . . . Data registers inputs (operands) ….. addressN/nameN outputs (results) ECE 447: I/O Device Architecture
1. Control registers - hold instructions that regulate the operation of internal I/O devices 2. Status registers - indicate the current status of internal I/O devices 3. Data registers - hold the input data sent to the I/O device and output data generated by this device 4. Data direction registers - control the direction (in or out) of the data flow to/from bidirectional data registers ECE 447: Input/Output Register Types
Memory mapped I/O Separate I/O (e.g., Intel) (e.g., Motorola) 0 0 0 I/O max I/O MAX MAX Control lines: read/write Control lines: read/write memory/io ECE 447: I/O Addressing Schemes (Same Instructions) (Differ Instructions)
$0000-$01FF 512 bytes RAM $0000 $1000 $1000-$103F 64 bytes I/O registers $B600 $B600-$B7FF 512 bytes EEPROM $D000 $D000-$FFFF 12 kbytes ROM $FFFF Single-chip mode ECE 447: 68HC11E9 Memory Map
RAM CPU ROM EEPROM A/D SPI TIMER SCI 8 (4) 8 4 2 PORT D PORT E PORT A 6 8 (4) 3 3 2 EXTERNAL RAM EXTERNAL EPROM EXTERNAL I/O EXTERNAL ROM ECE 447: Organization of MC68HC11 in Expanded Bus Mode
$0000-$01FF 512 bytes RAM $0000 $0000 EXT $1000 $1000 $1000-$103F 64 bytes I/O registers EXT $B600 $D000 $D000 $B600 $B600-$B7FF 512 bytes EEPROM $D000-$FFFF 12 Kbytes ROM EXT $FFFF $FFFF Single-chip mode Expanded bus mode ECE 447: Memory Map of MC68HC11E9
68HC11E9 A 68HC24 - Port Replacement Unit RAM 512B B B EEPROM 512B C C E D RAM (e.g. 5164) Program & data Buffalo monitor 12 kB 50 kB $2000-$B5FF ECE 447: New Micros Evaluation Board
$0000-$01FF 512 bytes RAM $0000 $1000 $1000-$103F 64 bytes I/O registers $2000 $2000-$B5ff ~50 kbytes RAM $B600 $B600-$B7FF 512 bytes EEPROM $D000 $D000-$FFFF 12 kbytes ROM $FFFF Expanded bus mode ECE 447: 68HC11E9 Memory Map, Expanded with External RAM