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Address Decoders

Address Decoders. Lecture L6.10 Section 6.3. MOUSE Layout. Address Bus (16 lines). Address Decoder. PROM. RAM2. cs. cs. cs. PROM 2716. RAM 6810. MPU 6802. PIA 6821. PIA. To outside world. Data Bus (8 lines). MOUSE Memory Map. Hex Address. Device.

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Address Decoders

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  1. Address Decoders Lecture L6.10 Section 6.3

  2. MOUSE Layout Address Bus (16 lines) Address Decoder PROM RAM2 cs cs cs PROM 2716 RAM 6810 MPU 6802 PIA 6821 PIA To outside world Data Bus (8 lines)

  3. MOUSE Memory Map Hex Address Device RAM1 (internal) 0000-007F RAM2 0080-00FF PROM B800-BFFF PIA 8000-8003

  4. System layout work sheet A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 RAM1 0 0 0 0 0 0 0 0 0 X X X X X X X 0000-007F RAM2 0 0 0 0 0 0 0 0 1 X X X X X X X 0080-00FF PROM 1 0 1 1 1 X X X X X X X X X X X B800-BFFF PIA 1 0 0 0 0 0 0 0 0 0 0 0 0 0 X X 8000-8003

  5. System layout work sheet A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 RAM1 0 0 0 0 0 0 0 0 0 X X X X X X X 0000-007F RAM2 0 0 0 0 0 0 0 0 1 X X X X X X X 0080-00FF PROM 1 0 1 1 1 X X X X X X X X X X X B800-BFFF PIA 1 0 0 0 0 0 0 0 0 0 0 0 0 0 X X 8000-8003 Use A7-A15 as inputs to address decoder Don’t cares PIA 8000-807F

  6. MODULE addecode TITLE 'Address Decoder' DECLARATIONS " INPUT PINS " A15,A14,A13,A12,A11,A10,A9,A8,A7 pin; " OUTPUT PINS " RAM1,RAM2,PROM,PIA pin istype 'com'; H,L,X = 1,0,.X.; Address = [A15,A14,A13,A12,A11,A10,A9,A8,A7,X,X,X,X,X,X,X]; EQUATIONS RAM1 = (Address <= ^h007F); RAM2 = (Address >= ^h0080) & (Address <= ^h00FF); PROM = (Address >= ^hB800) & (Address <= ^hBFFF); PIA = (Address >= ^h8000) & (Address <= ^h807F); addecode.abl

  7. addecode.abl (cont.) test_vectors (Address -> [RAM1,RAM2,PROM,PIA]) ^h0000 -> [ H, L, L, L ]; ^h004A -> [ H, L, L, L ]; ^h0080 -> [ L, H, L, L ]; ^h00DF -> [ L, H, L, L ]; ^hB800 -> [ L, L, H, L ]; ^hBDF0 -> [ L, L, H, L ]; ^h8000 -> [ L, L, L, H ]; ^h8002 -> [ L, L, L, H ]; end

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