150 likes | 234 Views
Decoders. Lecture L6.9 Section 6.4. Decoders. Decoders TTL Decoders. Y0. 2-to-4. A. Y1. Decoder. B. Y2. Y3. Decoders. B A Y0 Y1 Y2 Y3 !Y0 !Y1 !Y2 !Y3. 0 0 1 0 0 0 0 1 1 1 0 1 0 1 0 0 1 0 1 1 1 0 0 0 1 0 1 1 0 1 1 1 0 0 0 1 1 1 1 0.
E N D
Decoders Lecture L6.9 Section 6.4
Decoders • Decoders • TTL Decoders
Y0 2-to-4 A Y1 Decoder B Y2 Y3 Decoders B A Y0 Y1 Y2 Y3 !Y0 !Y1 !Y2 !Y3 0 0 1 0 0 0 0 1 1 1 0 1 0 1 0 0 1 0 1 1 1 0 0 0 1 0 1 1 0 1 1 1 0 0 0 1 1 1 1 0 A decoder with N inputs has 2N outputs
Decoders B A Y0 Y1 Y2 Y3 !Y0 !Y1 !Y2 !Y3 0 0 1 0 0 0 0 1 1 1 0 1 0 1 0 0 1 0 1 1 1 0 0 0 1 0 1 1 0 1 1 1 0 0 0 1 1 1 1 0 Y0 = !B & !A Y1 = !B & A Y2 = B & !A Y3 = B & A Define pins for active low outputs: ![Y3..Y0] PIN 39,37,36,35 ISTYPE 'com';
24decode.abl MODULE Decoder24 TITLE '2 to 4 Decoder, A. Student, 7/15/02' DECLARATIONS " INPUT PINS " B PIN 6; " Switch 1 A PIN 7; " Switch 2 " OUTPUT PINS " Y3..Y0 PIN 39,37,36,35 ISTYPE 'com'; " LED 5..8 EQUATIONS Y0 = !B & !A; Y1 = !B & A; Y2 = B & !A; Y3 = B & A; END Decoder24 B A Y0 Y1 Y2 Y3 !Y0 !Y1 !Y2 !Y3 0 0 1 0 0 0 0 1 1 1 0 1 0 1 0 0 1 0 1 1 1 0 0 0 1 0 1 1 0 1 1 1 0 0 0 1 1 1 1 0
24decode.abl MODULE Decoder24 TITLE '2 to 4 Decoder, A. Student, 7/15/02' DECLARATIONS " INPUT PINS " B PIN 6; " Switch 1 A PIN 7; " Switch 2 " OUTPUT PINS “ " LED 5..8 active low ![Y3..Y0] PIN 39,37,36,35 ISTYPE 'com'; EQUATIONS Y0 = !B & !A; Y1 = !B & A; Y2 = B & !A; Y3 = B & A; END Decoder24 Active Low B A Y0 Y1 Y2 Y3 !Y0 !Y1 !Y2 !Y3 0 0 1 0 0 0 0 1 1 1 0 1 0 1 0 0 1 0 1 1 1 0 0 0 1 0 1 1 0 1 1 1 0 0 0 1 1 1 1 0
3-to-8 Decoder C B A !Y0 !Y1 !Y2 !Y3 !Y4 !Y5 !Y6 !Y7 0 0 0 0 1 1 1 1 1 1 1 0 0 1 1 0 1 1 1 1 1 1 0 1 0 1 1 0 1 1 1 1 1 0 1 1 1 1 1 0 1 1 1 1 1 0 0 1 1 1 1 0 1 1 1 1 0 1 1 1 1 1 1 0 1 1 1 1 0 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 0
38decode.abl MODULE Decoder38 TITLE '3 to 8 Decoder, A. Student, 7/15/02' DECLARATIONS " INPUT PINS " C PIN 6; " Switch 1 B PIN 7; " Switch 2 A PIN 11; " Switch 3 " OUTPUT PINS " ![Y7..Y0] PIN 44,43,41,40,39,37,36,35 ISTYPE 'com'; " LED 1..8
C B A !Y0 !Y1 !Y2 !Y3 !Y4 !Y5 !Y6 !Y7 0 0 0 0 1 1 1 1 1 1 1 0 0 1 1 0 1 1 1 1 1 1 0 1 0 1 1 0 1 1 1 1 1 0 1 1 1 1 1 0 1 1 1 1 1 0 0 1 1 1 1 0 1 1 1 1 0 1 1 1 1 1 1 0 1 1 1 1 0 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 0 38decode.abl (cont’d) EQUATIONS Y0 = !C & !B & !A; Y1 = !C & !B & A; Y2 = !C & B & !A; Y3 = !C & B & A; Y4 = C & !B & !A; Y5 = C & !B & A; Y6 = C & B & !A; Y7 = C & B & A; END Decoder38 Recall: " OUTPUT PINS " ![Y7..Y0] PIN 44,43,41,40,39,37,36,35 ISTYPE 'com'; Active Low
1 16 1G Vcc 2 15 1A 2G 3 14 2A 1B 4 13 1Y0 2B 5 12 1Y1 2Y0 6 11 1Y2 2Y1 7 10 1Y3 2Y2 8 9 GND 2Y3 74LS139 TTL Decoders B A Y0 Y1 Y2 Y3 G 1 X X 1 1 1 1 0 0 0 0 1 1 1 0 0 1 1 0 1 1 0 1 0 1 1 0 1 0 1 1 1 1 1 0 Dual 2-4 Decoder
1 16 A Vcc 2 15 B Y0 3 14 C Y1 4 13 !G2A Y2 5 12 !G2B Y3 6 11 G1 Y4 7 10 Y7 Y5 8 9 GND Y6 74LS138 TTL Decoders G1 G2 C B A Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 X 1 X X X 1 1 1 1 1 1 1 1 0 X X X X 1 1 1 1 1 1 1 1 1 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 1 1 0 1 1 1 1 1 1 1 0 0 1 0 1 1 0 1 1 1 1 1 1 0 0 1 1 1 1 1 0 1 1 1 1 1 0 1 0 0 1 1 1 1 0 1 1 1 1 0 1 0 1 1 1 1 1 1 0 1 1 1 0 1 1 0 1 1 1 1 1 1 0 1 1 0 1 1 1 1 1 1 1 1 1 1 0 G2 = G2A # G2B 3-to-8 Decoder X = don't care
1 16 1C Vcc 2 15 1G 2C 3 14 B 2G 4 13 1Y3 A 5 12 1Y2 2Y3 6 11 1Y1 2Y2 7 10 1Y0 2Y1 8 9 GND 2Y0 74LS155 Recall: TTL Demultiplexer G C B A Y0 Y1 Y2 Y3 1 X X X 1 1 1 1 0 1 0 0 0 1 1 1 0 1 0 1 1 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 1 0 X 0 X X 1 1 1 1 X = don’t care Dual 1-to-4-line demultiplexer