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Tango Meeting ONERA, 21-06-16

Explore the PiLC Logic Controller and ADQ412 Digitizer upgrades implemented at DESY, enhancing data processing speed, power, and agility. These upgrades include FPGA technology, customizable interfaces, and versatile applications, providing a high-level user-friendly experience. Integrated into the Sardana framework and Tango server, these devices offer specialized functionalities like Trigger Generator, Delay Generator, and Detector counts collection. Additionally, the ADQ412 Digitizer brings high-performance digitization capabilities with customizable FPGA resources and a µTCA interface, ideal for broadband applications. The GPFS storage system ensures efficient data handling, transfer, and long-term storage, supported by various protocols like ZMQ, NFS-3, and SMB. This initiative, a collaboration between DESY-CC and IBM, aims to streamline data production, processing, and storage for scientific experiments at DESY and institutes.

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Tango Meeting ONERA, 21-06-16

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  1. Experiment Control Upgrades at DESY Teresa Núñez DESY Photon Science • PiLC Logic Controller • ADQ412 Digitizer • Diffractometer in Sardana • GPFS storage system Tango Meeting ONERA, 21-06-16

  2. PiLC Logic Controller Multifunctional and customizable module for fast signal processing • Data processing power, speed, synchronity -> FPGA • Configurable input/outputs -> NIM/TTL I/O, ADC and DAC cards • High-level user-friendly interface -> Raspberry Pi 2 Scope of applications only limited by the FPGA functionality Developed at DESY (FS-EC group)

  3. PiLC Logic Controller (ctd.) Raspberry Pi2 Touch display Ethernet NIM-Crate plug FPGA LEDs display I/O status 16 slots for I/O cards Isolated Lemo I/0 jacks 2 USB 2.0 jacks

  4. PiLC - Software Configured and controlled via Tango Servers PiLCTriggerGenarator TS Raspberry Pi2 (Debian OS) XMCD TS BCM2835 lib HL lib … BL Computer PiLC TS • Download FPGA firmware • Read/write FPGA registers • Control FPGA operation I/Os i/o cards FPGA PiLC

  5. PiLC – Applications Dedicated Tango Server for each application • Delay Generator for Pump-Probe experiments • Detector counts collection based on input signal depending on • magnet state for XMCD measurements • VFC: frequency generator linearly dependent on an analog input

  6. PiLC – Applications (ctd.) • Trigger Generator: Continuous scans triggered by PiLC • Six trigger modes: based on time and/or position (start and frequency, position ‘zig-zag’ selectable) or external signal. • Up to five encoder and one counter values (extensible) stored in circular buffer (32 MB depth) during scans • Selectable encoder triggering • Data (encoders/counter readings) accessible during scan • Maximum trigger rate depends on stored data and requested number of triggers (limited by buffer full): up to 11.2 kHz in worst scenario Integrated in Sardana via Macros and TriggerGenerator controller (under test)

  7. ADQ412 Digitizer Portable high performance digitizer with customizable FPGA and µTCA interface • Analog inputs -> sampled with high resolution, capture rate and bandwidth • FPGA -> offering resources for customized applications • µTCA interface and easy-to-use API Ideal for broadband applications and high speed data recording High Speed Digitizer from SP Devices

  8. ADQ412 Digitizer - Software Integrated into Tango , DOOCS and Karabo via a High Level library Upload user logic: prepocess acquired data -> peak detection, energy calculation, … routing trigger signal train ID Trigger µTCA calls ADC FPGA … SPDevices libs ADC ADQ APD(s) HighLevel library CPU Tango, Karabo, DOOCs, … µTCA • Configures FPGA (clock, trigger, acquisition) • Handles data transfer to CPU (PCIe backplane) • Provides data to user in specified data streams • Allows more than one ADQ per µTCA HighLevel library: developed at XFEL (A.Beckmann)

  9. ADQ412 Digitizer – Applications Analog signals sampling with up to 7GSample/s • Fully time resolved nuclear resonant scattering (P01): • Peak detection, deconvolution and fitting implemented in FPGA • Dedicated Tango Server for configuring FPGA and getting/storing processed data Overcome limitations of conventional systems (no information on pulse height, only one single event timed per excitation) in burst and average rates

  10. Diffractometer in Sardana Implementation accepeted and available in Sardana develop branch and releases > 2.0.0 • Diffractometer controller • Dedicated macros • Dedicated Taurus GUIs Documentation in Sardana SEP4

  11. GPFS storage system Handle massive data production at the experiments • Cope with data rates • Accept data from ‘everywhere’ • Implement authorization • Provide long term storage • Support data processing Common initiative of DESY-CC and IBM (Speed)

  12. GPFS storage system (ctd.) Two gpfs servers installed at Computer Center: • Beamline FS: optimized for ingestion of data at high speed bursts • Core FS: optimized for capacity and concurrent parallel access Several protocols for data transfer to storage system: • ZMQ: • high throughput • decouples operating systems • reduces disk I/O • not necessarily site-specific • NFS-3, SMB

  13. GPFS storage servers (ctd.) Experiment Hall • PETRA III, in-house and derived data • Proxy Nodes • Cache data • NFS, SMB to GPFS • BL Cluser • Stores data during beamtime • Data are copied to the Core cluster within minutes • Core Cluster: ACLs • WGS: Analysis, NRTA • dCache: Tape archive • Portal: File discovery, downloads Detector PC Experiment PC NFS-3, SMB NFS-3, SMB, ZMQ Computer Center Proxy Nodes Infiniband WGS GPFS Beamline Cluster GPFS Core Cluster dCache DESY and institutes NFS-3 SMB Linux PC Windows PC Portal scp http winscp

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