Aiman El-Maleh and Saqib Khurshid

Efficient Test Compaction for Combinational Circuits Based on Fault Detection Count-Directed Clustering Aiman El-Maleh and Saqib Khurshid King Fahd University of Petroleum & Minerals, Dept. of Computer Eng., Saudi Arabia

Outline • Motivation • Test compaction techniques • Proposed Algorithm • Illustrative Example • Experimental results • Conclusions

Motivation • Increasing complexity of systems-on-a-chip and its test data size increased cost of testing. • Cost of automatic test equipment increases with increase in speed, channel capacity, and memory. • Need for test data reduction is imperative • Test compression • Test compaction: Static and Dynamic • Static compaction techniques are preferred to dynamic compaction • dynamic compaction is more time consuming • dynamic compaction does not take advantage of random test pattern generation. • static compaction is independent of ATPG (run ATPG in parallel to manage design complexity)

Static Test Compaction Techniques Static Compaction Algorithms for Combinational Circuits Test Vector Modification Test Vector Addition & Removal Redundant Vector Elimination Essential Fault Pruning Set Covering Essential Fault Pruning Test Vector Reordering Merging Based on ATPG Test Vector Decomposition Based on ATPG Based on Raising Based on Relaxation IFC CBC FCC

Proposed Test Compaction Technique • Based on test vector decomposition and clustering. • Two vectors are clustered together if they are compatible. • Two test vectors are compatible if they do not have conflicting values in any bit position. • A test vector decomposed into a fault component contains only the assignments necessary for the detection of the fault. • Example • T=10011101101 • Decomposed into T1 for f1 1xx1x10xx01 • Decomposed into T2 for f2 x0011x0xxxx

Proposed Test Compaction Technique • Fault detection count directed clustering (FCC). • Clustering in increasing order of faults detection count. • Clustering order gives more degree of freedom and results in better compaction. • A fault detected by N vectors has N test vector components • All components will be checked for compatibility before creating a new cluster

FCC Algorithm • 1. Fault simulate T without fault dropping. • 1.1 Record the number of test vectors detecting each fault. • 2. Group the faults by their detection count. • 2.1. Sort the faults in ascending order of their detection count. • 3. For every essential fault f that is detected by a test vector t: • 3.1. Extract the atomic component cf from t. • 3.2. If the number of compatibility sets is zero, create a new compatibility set, map cfto it, and then go to Step 3. • 3.3. Map cfto an existing compatibility set, if possible, and then go to Step 3. • 3.4. Create a new compatibility set and map cfto it.

FCC Algorithm • 4. Fault simulate all the compatibility sets and drop all the remaining faults that are detected. • 5. For each remaining undetected fault f that is detected by a set of test vector T’: • 5.1. For every test vector t’, where t’ is a member of T’: • 5.2. Extract the atomic component cf from t’. • 5.3. If the number of compatibility sets is zero, create a new compatibility set, map cfto it, and then go to Step 5. • 5.4. Map cfto an existing compatibility set, if possible, and then go to Step 5, otherwise go to Step 5.1.

FCC Algorithm • 6. Random fill test vectors of all the compatibility sets. • 7. Fault simulate all the compatibility sets and drop all detected faults. • 8. For each remaining undetected fault f detected by a set of test vector T’: • 8.1. For every test vector t’, where t’ is a member of T’: • 8.2. Extract the atomic component cffrom t’. • 8.3. Map cf to an existing compatibility set, if possible, and then go to Step 8, otherwise go to Step 8.1. • 8.4. Create a new compatibility set and map cfto it.

Illustrative Example

Illustrative Example Test components for f3: {x0xxxx11x1 , x0x1x1xxx1 } Test components for f5: {xxxx10x0xx , xxxx1xx101 }

Iterative FCC • To increase level of compaction, FCC can be applied iteratively until no improvement is possible. • Apply FCC iteratively until the length of the test set cannot be reduced in the last six iterations (FCC6+). • Unspecified bits in the test set T are assigned random values before every call to the FCC algorithm.

Experimental results • Benchmark circuits • ISCAS 85 and full-scanned versions of ISCAS 89 circuits • Test sets • Generated by HITEC • Compared Techniques • Reverse Order Fault Simulation (ROF): 20 iterations • Random Merging (RM) • Independent Fault Clustering (IFC) • Iterative Independent Fault Clustering (IFC-ITR)

Circuit Orig. ROF RM FCC s13207 633 476 252 238 s15850 657 456 181 144 s3330 704 277 248 230 s38417 1472 822 187 130 s38584 1174 819 232 138 s4863 132 65 59 47 s5378 359 252 145 119 s6669 138 52 42 36 s9234 620 375 202 170 Test Compaction Results An average compaction of 70% over the original test set An average compaction of 39% over ROF An average compaction of 21% over RM

Circuit #TV #TV CPU #TV CPU s13207 633 244 34.06 238 10.02 s15850 657 142 50.97 144 15.97 s3330 704 238 3.05 230 0.99 s38417 1472 150 838 130 225.95 s38584 1174 148 4718 138 154.02 s4863 132 50 3.02 47 3.95 s5378 359 120 3.05 119 1 s6669 s9234 138 620 182 40 7.91 11.06 170 36 5.02 3.04 Comparison with IFC Original IFC FCC An average compaction of 7% over IFC 51% less CPU time on average

Circuit #TV #TV CPU #TV CPU s13207 633 238 473.12 234 69.02 s15850 657 129 374.95 118 1365.98 s3330 704 196 30.02 192 4.2 s38417 1472 120 3775.06 108 2337 s38584 1174 124 8217.08 114 1735.17 s4863 132 42 70.88 38 6.96 s5378 359 117 109 107 13.99 s6669 s9234 138 620 155 30 175.01 200.93 139 28 12.02 27.04 Comparison with Iterative IFC Original ROF+IFC-ITR FCC6+ An average compaction of 8% over ROF+IFC-ITR 52% less CPU time on average

Overall Test Compaction Comparison FCC6+ achieves an average compaction of 13.5% over FCC

Conclusions • Proposed a new test compaction technique for combinational circuits based on test vector clustering. • Test vectors are decomposed and clustered in an increasing order of fault detection count. • Higher level of compaction in a much more efficient CPU time than IFC. • An iterative application of the proposed technique has also shown significant increase in achieved level of test compaction.

Aiman El-Maleh and Saqib Khurshid