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CCD based vertex detector design for JLC. Tsukasa Aso Toyama National College of Maritime Technology G.Iwai,K.Fujiwara,H.Takayama,N.Tamura Niigata University Y.Sugimoto, A.Miyamoto KEK K.Abe Tohoku Gakuin University JLC Vertex group. Contents. Design concepts and Requirements
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CCD based vertex detector design for JLC Tsukasa Aso Toyama National College of Maritime Technology G.Iwai,K.Fujiwara,H.Takayama,N.Tamura Niigata University Y.Sugimoto, A.Miyamoto KEK K.Abe Tohoku Gakuin University JLC Vertex group VERTEX2002 in Hawaii Island, Kona
Contents • Design concepts and Requirements • Accelerator Design • VTX detector design • IR design and backgrounds • Present results and Activities • Radiation immunity • Spatial resolution • Fast readout electronics • Summary VERTEX2002 in Hawaii Island, Kona
I ) 1/150Hz=6.7ms Beam profile at IP 192 bunches Train = One pulse 3.0nm dz=110um 1.4ns 243nm N~1E+10 particles AcceleratorDesign 6mrad crab crossing Beam time Structure Bunch-train Structure VERTEX2002 in Hawaii Island, Kona
VTX Design • VTX • Precise Secondary vertex reconstruction • Reconstruct decay vertices of B and D meson decays for excellent b/c jet separation • Improvement of momentum resolution • Requirements • Unambiguous 2D reconstruction • Pixel devicesIf the hit rate of background was about 1hit/mm2/train, It correspond to 100% occupancy in Strip detector 1hit/(20um x 5cm)/train. • Low materials(Especially for low momentum tracks) • Thin devices • Simple structure/operation Operation at room temperature ~ 0 Celsius. VERTEX2002 in Hawaii Island, Kona
Room temperature operation CCD Flatness • CCDs • Feature • Thin/Low material • Low power consumption • But Needs cooling ? • w/o Cooling system • Avoid multiple scattering by cooling system • Avoid thermal distortion of sensors ( fabrication – operation temperature discrepancy) • Desirable to operate in room temperature( ~ 0 Celsius ) Back-illumination CCD : HPK S7170Thickness ~20um VERTEX2002 in Hawaii Island, Kona
24 18 1. 60 VTX detector design • Baseline design • |cos | < 0.90 • Pixel size 25 um • 1.25cm x 5cm x330um • 4Layers with 10deg tilt( r=24,36,48,60 mm)( Ladder 16/24/32/40)(Sensor 2/3/4/5) • Intrinsic resolution 4 um(Just for a Simulation input ) VERTEX2002 in Hawaii Island, Kona
IR Design and Background Model d) 3T with SC-QC1 R=8~16.5cm QC1 : Super Conducting magnet L* = 4.3 m To reduce back scattering background produced by the interaction at QC1 VERTEX2002 in Hawaii Island, Kona
Background estimation • Beam-Beam Interaction • e+e- pair production • Beamstrahlung • Secondary produced backgrounds *Geant4 ( SR/PhotoNuclear ) Include solenoid ( uniform 3T ) +QC1 ( Ideal gradient ) Electron backgrounds ( /mm2/train) **Geant3 1Yr operation e+e- pair ~1hit/mm2/train 1.5E+11/cm2/Yr Neutrons Previous Study 1E+9/cm2/Yr (Beamstrahlung) 95bunches Low Lum. Similar to TRC(X) NLC - JLC VERTEX2002 in Hawaii Island, Kona
II) Present results and Activities • Radiation immunity • Spatial resolution • Fast readout electronics VERTEX2002 in Hawaii Island, Kona
Radiation Immunity MPP Operation Si02 – Si Interface Inverted by holes 3-Phase CCD 2-Phase CCD Notch CCD Low density VERTEX2002 in Hawaii Island, Kona Small packet
CCD Structure [cont’d] HPK10 Radiation Immunity Electrons from Sr90 Neutrons from Cf252 Dark current (electrons/pix) Result > 1.5E+11e/cm2 JLC: 1.5E+11/cm2/yr @2.4cm Vee (V) Vee (V) Result > 1.5E+10 n/cm2 JLC: 1E+9/cm2/Yr (Preliminary) VERTEX2002 in Hawaii Island, Kona
Electron Radiation Immunity CTI properties CTI~Nt/Ns Concentration Nt : Defect Ns : Signal Std CTI Notch VCTI ( Irradiation) 3Phase 2Phase Neutron HPK10 CTI ( Irradiation) VERTEX2002 in Hawaii Island, Kona
Radiation test -1- • Why is additional test of radiation damage needed? Radiation damage is thought to be proportional to NIEL The radiation damage at JLC estimated to be 10 times bigger than our study using Sr90. Radiation damage by high energy (>10MeV) electrons should be studied. Non-Ionizing Energy Loss VERTEX2002 in Hawaii Island, Kona
Radiation test (First trial 2002/12/9) • Experimental setup Tohoku-Univ • Choice of Settings • Primary Beam Energy100MeV electrons • Target radiation length 0.1/0.5 X0 • B field High/Low Tesla mode Electron Beam 100 MeV Bending Magnet Pt 0.1X0 0.5X0 VERTEX2002 in Hawaii Island, Kona
S/N > 10 @278K Spatial resolution-Test beam- 4-Layers CCD Tracker HPK50 : HPK with epitaxial layer of 50um Dark current is suppressed by the successful Operation of Inverted mode. Noises in a pixel (R/O cycle ~ 3sec. ) HPK10(23e)/ HPK50(58e) / EEV(37e) VERTEX2002 in Hawaii Island, Kona
P R = Pmax Spatial resolution Signal of Pixel B Pixel B RLM : RLM function AC : Analog centered Intrinsic Resolution Is better than 3 um. Thermal diffusion of signal charge improves resolution. Pixel A Signal of Pixel A VERTEX2002 in Hawaii Island, Kona
Energy deposit(keV) Geant4:Energy Deposit2GeV,π‐ HPK50 12.0keV 7×7cls HPK10 2.2keV 2×2cls 51.1um 11.0um Thickness of active layer(um) Comparison with simulation Energy Deposit in Silicon Active Layer • Estimated Active layer • 11um for HPK10 • 51um for HPK50 VERTEX2002 in Hawaii Island, Kona
Charge sharing simulation d ~ sqrt(2Dt) HPK50 Depletion (d) Open:Exp Close:Sim Drift coff. *Drift Time Energy(keV) Field Free (f) f ~ G.R.Hopkinson NIM 216(1983)432 HPK10 Active (A=d+f) X N×NClustering X HPK50 HPK10 +:d/A=50% ×:d/A=30% *:d/A=20% △:d/A=10% □:d/A=5% VERTEX2002 in Hawaii Island, Kona Log(R) Log(R)
Electronics fabrication • Readout operation • All pixels must be readout every train crossing interval of 6.7 ms. • 10MHz readout can transfer about 250x250pix in the interval. 1.25cm 250x250pix/chip 16chips/sensor Total 424 sensors 6784chips needed. 5cm VERTEX2002 in Hawaii Island, Kona
Fast R/O System -1- • Evaluation board of ADC • CCD Signal processor chip for Digital Camera 9x9mm2 chip size ~ $6/chip • AD9844A(Analog Devices Co.) • 12bit 20MSPS ADC • 20MSPS Correlated Double Sampler • 6bit variable CDS Gain Amp. • Low power consumption(65mW/2.7V) VERTEX2002 in Hawaii Island, Kona
Fast R/O System -2- Linearity was confirmed. LSB resolution 0.2mV. Dynamic range 0~800mV AD9844A[FADC] XC2V404CS144C(FPGA) LVDS Input Backside Interface to Digital board (12 bit DBUS] CCD SIGNAL VIDEO SIGNAL AD6644 input VERTEX2002 in Hawaii Island, Kona
Summary • Design and status of JLC VTX detector is presented. • Goal --- CCD operation at room temperature • Radiation immunity : No problem • But, further investigation is necessary.Electrons => Higher energy must be confirmed experimentally. ( Additional experiments are going. )Neutrons => Yield of neutron is ambiguous ( beam dump ) ( Reliable simulation with precise geometry, JUPITER) • Spatial resolution : < 3um at -15 C. • More investigation of charge sharing property improve resolution? ( Laser scanner test at Niigata Univ. with 2x2um spot.) • Readout Electronics: Evaluating • Study the effect of Fast readout for irradiated samples • Evaluation of thinned device • Partially thinned CCD ..(Distortion measurement system: ready) VERTEX2002 in Hawaii Island, Kona