Computer Architecture and Design – ECEN 350

Computer Architecture and Design – ECEN 350 Part 2 [Some slides adapted from M. Irwin, D. Paterson and others]

The Instruction Set Architecture (ISA) software instruction set architecture hardware The interface description separating the software and hardware

How Do the Pieces Fit Together? • Coordination of many levels of abstraction • Under a rapidlychanging set of forces • Design, measurement, and evaluation Applications Operating System Compiler Firmware Instruction Set Architecture Memory system I/O system network Processor Datapath & Control Digital Design Circuit Design

The MIPS ISA Registers • Instruction Categories • Load/Store • Computational • Jump and Branch • Floating Point • coprocessor • Memory Management • Special R0 - R31 PC HI LO • 3 Instruction Formats: all 32 bits wide OP rs rd sa funct rt OP rs rt immediate OP jump target

Assembly Language Instructions • The language of the machine • Want an ISA that makes it easy to build the hardware and the compiler while maximizing performance and minimizing cost • Stored program (von Neumann) concept • Instructions are stored in memory (as is the data) • Our target: the MIPS ISA • similar to other ISAs developed since the 1980‘s Design goals: maximize performance, minimize cost, reduce design time (time-to-market), minimize memory space (embedded systems), minimize power consumption (mobile systems)

RISC - Reduced Instruction Set Computer • RISC philosophy • fixed instruction lengths • load-store instruction sets • limited number of addressing modes • limited number of operations • MIPS, Sun SPARC, HP PA-RISC, IBM PowerPC … • Instruction sets are measured by how well compilers use them as opposed to how well assembly language programmers use them • CISC (C for complex), e.g., Intel x86

The Four Design Principles • Simplicity favors regularity. • Smaller is faster. • Make the common case fast. • Good design demands good compromises.

The MIPS ISA • Instruction Categories • Load/Store • Computational • Jump and Branch • Floating Point • coprocessor • Memory Management • Special Registers R0 - R31 PC HI LO

MIPS Registers • Unlike HLL like C or Java, assembly cannot use variables • Why not? Keep Hardware Simple • Assembly Operands are registers • limited number of special locations built directly into the hardware • operations can only be performed on these! • Benefit: Since registers are directly in hardware, they are very fast (faster than 1 billionth of a second)

MIPS Registers • Drawback: Since registers are in hardware, there are a predetermined number of them • Solution: MIPS code must be very carefully put together to efficiently use registers • 32 registers in MIPS • Why 32? • Large for the time, easier compiling • Small now (but we are stuck with it) • Each MIPS register is 32 bits wide • Groups of 32 bits called a word in MIPS

Naming Conventions for Registers 0 $zero constant 0 (Hdware) 1 $at reserved for assembler 2 $v0 expression evaluation & 3 $v1 function results 4 $a0 arguments 5 $a1 6 $a2 7 $a3 8 $t0temporary: caller saves . . . (callee can clobber) 15 $t7 16 $s0 callee saves . . . (caller can clobber) 23 $s7 24 $t8temporary (cont’d) 25 $t9 26 $k0 reserved for OS kernel 27 $k1 28 $gp pointer to global area 29 $sp stack pointer 30 $fp frame pointer 31 $ra return address (Hdware)

MIPS Arithmetic Instruction • MIPS assembly language arithmetic statement add $t0, $s1, $s2 sub $t0, $s1, $s2 • Each arithmetic instruction performs only one operation • Each arithmetic instruction specifies exactly three operands destination  source1 op source2 • Operand order is fixed (the destination is specified first) • The operands are contained in the datapath’s register file ($t0, $s1, $s2)

Compiling More Complex Statements • Assuming variable b is stored in register $s1, c is stored in $s2, and d is stored in $s3 and the result is to be left in $s0, what is the assembler equivalent to the C statement h = (b - c) + d

Compiling More Complex Statements • Assuming variable b is stored in register $s1, c is stored in $s2, and d is stored in $s3 and the result is to be left in $s0, what is the assembler equivalent to the C statement h = (b - c) + d sub $t0, $s1, $s2 add $s0, $t0, $s3

Compiling More Complex Statements • One particular immediate, the number zero (0), appears very often in code. • So we define register zero ($0 or $zero) to always have the value 0; eg add $s0,$s1,$zero(in MIPS) f = g (in C) where MIPS registers $s0,$s1 are associated with C variables f, g • defined in hardware, so an instruction add $zero,$zero,$s0 will not do anything!

000000 10001 10010 01000 00000 100000 op rs rt rd shamt funct Machine Language - Arithmetic Instruction • Instructions, like registers and words of data, are also 32 bits long • Example: add $t0, $s1, $s2 registers have numbers $t0=$8,$s1=$17,$s2=$18 • Instruction Format: Can you guess what the field names stand for?

op rs rt rd shamt funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits R-format Example add $t0, $s1, $s2 special $s1 $s2 $t0 0 add 0 17 18 8 0 32 000000 10001 10010 01000 00000 100000 000000100011001001000000001000002 = 0232402016

op rs rt rd shamt funct MIPS Instruction Fields • op • rs • rt • rd • shamt • funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits = 32 bits opcode indicating operation to be performed address of the first register source operand address of the second register source operand the register destination address shift amount (for shift instructions) function code that selects the specific variant of the operation specified in the opcode field

Dealing with Constants • Small constants are used quite frequently (50% of operands in many common programs) e.g., A = A + 5; B = B + 1; C = C - 18; • Solutions? Why not? • Put “typical constants” in memory and load them • Create hard-wired registers (like $zero) for constants like 1, 2, 4, 10, … • How do we make this work? • How do we Make the common case fast !

Constant (or Immediate) Operands • Include constants inside arithmetic instructions • Much faster than if they have to be loaded from memory (they come in from memory with the instruction itself) • MIPS immediate instructions addi $s3, $s3, 4 #$s3 = $s3 + 4 • There is no subi instruction, can you guess why not?

Machine Language – Immediate Instructions • What instruction format is used for the addi ?addi $s3, $s3, 4 #$s3 = $s3 + 4 • Machine format:

I format op rs rt 16 bit immediate 8 19 19 4 Machine Language – Immediate Instructions • What instruction format is used for the addi ?addi $s3, $s3, 4 #$s3 = $s3 + 4 • Machine format: • The constant is kept inside the instruction itself! • So must use the I format – Immediate format • Limits immediate values to the range +215–1 to -215

Machine Language – Immediate Instructions • Given the following lines in MIPS Assembly Language • Assemble the MIPS object code for these four lines:

32 32 32 Processor – Memory Interconnections • Memory is a large, single-dimensional array • An address acts as the index into the memory array The word address of the data Memory read addr/ write addr Processor ? locations read data 232 Bytes(4 GB)230 Words (1 GW) write data 10 8 101 4 1 0 The data stored in the memory 32 bits = 4 Bytes = 1 Word

101 102 103 104 105 ... ... ... 23 42 Processor – Memory Interconnections • Consider memory to be a single huge array: • Each cell of the array has an address associated with it. • Each cell also stores some value. • Do you think they use signed or unsigned numbers? Negative address?! • Don’t confuse the address referring to a memory location with the value stored in that location.

Location (address) 101 102 103 104 105 ... ... ... x y 23 42 name Processor – Memory Interconnections • An address refers to a particular memory location. In other words, it points to a memory location. • Pointer: A variable that contains the address of a variable. 104 p

x = 3; p x p x p x ? ? ? 3 3 p =&x; Processor – Memory Interconnections • How to create a pointer: & operator: get address of a variable “dereference operator”: get value pointed toprintf(“p points to %d\n”,*p); int *p, x;

p x p x 5 3 Processor – Memory Interconnections • How to change a variable pointed to? • Use dereference * operator on left of = *p = 5;

Accessing Memory • MIPS has two basic data transfer instructions for accessing memory (assume $s3 holds 2410) lw $t0, 4($s3) #load word from memory sw $t0, 8($s3) #store word to memory • The data transfer instruction must specify • where in memory to read from (load) or write to (store) – memory address • where in the register file to write to (load) or read from (store) – register destination (source) • The memory address is formed by summing the constant portion of the instruction and the contents of the second register

Accessing Memory • MIPS has two basic data transfer instructions for accessing memory (assume $s3 holds 2410) lw $t0, 4($s3) #load word from memory sw $t0, 8($s3) #store word to memory • The data transfer instruction must specify • where in memory to read from (load) or write to (store) – memory address • where in the register file to write to (load) or read from (store) – register destination (source) • The memory address is formed by summing the constant portion of the instruction and the contents of the second register 28 32

MIPS Memory Addressing . . . 0 1 1 0 24 Memory . . . 0 1 0 1 20 . . . 1 1 0 0 16 . . . 0 0 0 1 12 . . . 0 0 1 0 8 . . . 1 0 0 0 4 . . . 0 1 0 0 0 Data Word Address • The memory address is formed by summing the constant portion of the instruction and the contents of the second (base) register lw $t0, 4($s3) #what is loaded into $t0 sw $t0, 8($s3) #$t0 is stored where? $s3 holds 8

MIPS Memory Addressing . . . 0 1 1 0 24 Memory . . . 0 1 0 1 20 . . . 1 1 0 0 16 . . . 0001 . . . 0 0 0 1 12 . . . 0 0 1 0 8 . . . 1 0 0 0 4 . . . 0 1 0 0 0 32 bit Data Word Address • The memory address is formed by summing the constant portion of the instruction and the contents of the second (base) register lw $t0, 4($s3) #what? is loaded into $t0 sw $t0, 8($s3) #$t0 is stored where? $s3 holds 8 . . . 0001 in location 16

Compiling with Loads and Stores . . . . . . A[3] $s3+12 A[2] $s3+8 A[1] $s3+4 A[0] $s3 • Assuming variable b is stored in $s2 and that the base address of array A is in $s3, what is the MIPS assembly code for the C statement A[8] = A[2] - b

Compiling with Loads and Stores . . . . . . A[3] $s3+12 A[2] $s3+8 A[1] $s3+4 A[0] $s3 • Assuming variable b is stored in $s2 and that the base address of array A is in $s3, what is the MIPS assembly code for the C statement A[8] = A[2] - b lw $t0, 8($s3) sub $t0, $t0, $s2 sw $t0, 32($s3)

Compiling with a Variable Array Index . . . . . . A[3] $s4+12 A[2] $s4+8 A[1] $s4+4 A[0] $s4 • Assuming that the base address of array A is in register $s4, and variables b, c, and i are in $s1, $s2, and $s3, respectively, what is the MIPS assembly code for the C statement c = A[i] - b add $t1, $s3, $s3 #array index i is in $s3 add $t1, $t1, $t1 #temp reg $t1 holds 4*i

Compiling with a Variable Array Index . . . . . . A[3] $s4+12 A[2] $s4+8 A[1] $s4+4 A[0] $s4 • Assuming that the base address of array A is in register $s4, and variables b, c, and i are in $s1, $s2, and $s3, respectively, what is the MIPS assembly code for the C statement c = A[i] - b add $t1, $s3, $s3 #array index i is in $s3 add $t1, $t1, $t1 #temp reg $t1 holds 4*i add $t1, $t1, $s4 #addr of A[i] now in $t1 lw $t0, 0($t1) sub $s2, $t0, $s1

Review: MIPS Instructions, so far

The MIPS ISA • 3 Instruction Formats: all 32 bits wide OP rs rd sa funct rt OP rs rt immediate jump target OP

Review: Unsigned Binary Representation 231 230 229 . . . 23 22 21 20 bit weight 31 30 29 . . . 3 2 1 0 bit position 1 1 1 . . . 1 1 1 1 bit 1 0 0 0 . . . 0 0 0 0 - 1 232 - 1 232 - 4 232 - 3 232 - 2 232 - 1

complement all the bits 0101 1011 and add a 1 and add a 1 0110 1010 complement all the bits Review: Signed Binary Representation -23 = -(23 - 1) = 23 - 1 =

op rs rt rd shamt funct MIPS Instruction Fields • op • rs • rt • rd • shamt • funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits = 32 bits opcode indicating operation to be performed address of the first register source operand address of the second register source operand the register destination address shift amount (for shift instructions) function code that selects the specific variant of the operation specified in the opcode field

23hex 18 8 24 100011 10010 01000 0000000000011000 op rs rt 16 bit number Machine Language - Load Instruction • Consider the load-word and store-word instr’s • What would the regularity principle have us do? • But . . . Good design demands compromise • Introduce a new type of instruction format • I-type for data transfer instructions (previous format was R-type for register) • Example: lw $t0, 24($s2)

Quiz #1 • Take out a sheet of paper • Write your name and UIN at the top • Translate the following instructions into machine code • add $t0, $zero, $zero • lw$t2, 32 ($t2)

Memory Address Location • Example: lw $t0, 24($s2) Memory 0xf f f f f f f f 2410 + $s2 = 0x00000002 0x12004094 $s2 Note that the offset can be positive or negative 0x0000000c 0x00000008 0x00000004 0x00000000 data word address (hex)

. . . 1001 0100 + . . . 0001 1000 . . . 1010 1100 = 0x120040ac Memory Address Location • Example: lw $t0, 24($s2) Memory 0xf f f f f f f f 2410 + $s2 = $t0 0x00000002 0x120040ac 0x12004094 $s2 Note that the offset can be positive or negative 0x0000000c 0x00000008 0x00000004 0x00000000 data word address (hex)

43 18 8 24 101011 10010 01000 0000000000011000 op rs rt 16 bit number Machine Language - Store Instruction • Example: sw $t0, 24($s2) • A 16-bit offset means access is limited to memory locations within a range of 213 = 8,192 words (215 = 32,768 bytes) of the address in the base register $s2 • 2’s complement (1 sign bit + 15 magnitude bits)

43 18 8 24 101011 10010 01000 0000000000011000 op rs rt 16 bit number Machine Language - Store Instruction • Example: sw $t0, 24($s2) • A 16-bit offset means access is limited to memory locations within a range of +213-1 to -213 (~8,192) words (+215-1 to -215 (~32,768) bytes) of the address in the base register $s2 • 2’s complement (1 sign bit + 15 magnitude bits)

Machine Language – Immediate Instructions • What instruction format is used for the addi ?addi $s3, $s3, 4 #$s3 = $s3 + 4 • Machine format:

Computer Architecture and Design – ECEN 350