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Current-Mode Multi-Channel Integrating ADC

Current-Mode Multi-Channel Integrating ADC. Electrical Engineering and Computer Science Advisor: Dr. Benjamin J. Blalock Neena Nambiar 16 st April 2009. Outline. Background Analog-to-Digital Converters Motivation Current mode ADC Current Ramp Generator Current Comparator

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Current-Mode Multi-Channel Integrating ADC

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  1. Current-Mode Multi-Channel Integrating ADC Electrical Engineering and Computer Science Advisor: Dr. Benjamin J. Blalock Neena Nambiar 16st April 2009

  2. Outline • Background • Analog-to-Digital Converters • Motivation • Current mode ADC • Current Ramp Generator • Current Comparator • Gray Code Counter • Measurement • Test Setup • Test Results • Conclusion

  3. Section IBackground

  4. Analog to Digital Converters (ADC) • Convert analog information from the real world to digital for information processing • E.g.: temperature, pressure, voice, color, light, etc. • Important parameters include: • Sampling rate • Input signal range • Resolution • Power dissipation • Types of ADCs • Sensor data • Communication systems

  5. Motivation • Voltage mode ADC converts voltage to digital. Eg. Temperature sensor • Sensors with current signals. • Electrodes • A multi-channel ADC to convert multiple sensor signals to digital simultaneously. • Photosensors provide current output signals • Transimpedance amplifiers are implemented to convert current to voltage. • Bandwidth, offset, linearity of the amplifier play a key role in achievable accuracy. • Multi-channel current-mode Wilkinson used directly • Reduction in power dissipation • Improves area efficiency

  6. Research Goals • A current-mode ADC to support current output sensors and photodiodes. • Gray code counter • To support a high rate of counting • Design to support 12-bit resolution • current-ramp generator • comparator • The ADC should be tested for functionality and the parameters of the ADC are to be measured.

  7. Section IICurrent-Mode Wilkinson ADCDesign Blocks

  8. Multi-channel Wilkinson ADC • Building blocks of the Multichannel Wilkinson ADC • Single Ramp Generator • Counter • Number of comparators = number of channels • ADC operation: • Phase 1: comparators sample the input and ramp generator resets. • Phase 2: • ramp changes from 0 to IREF • counter counts from 0 to 4096 (e.g., 12 bit). • channel comparator changes state, storing value of count

  9. Current Ramp Generator • Ramp Generator provides a linearly increasing current with respect to time • VDS modulation of Mp2 causing nonlinearity is dealt with using a CG stage Mp1CG. • Offset current due to OTA2 offset removed by using C2, Mn1 and S2. • Improved matching using active current mirrors

  10. Current Comparator • Current comparator compares two currents and changes the output state depending on the comparison • Minimum bias current maintained in signal path transistors • OTA5 (p-input differential pair) used instead of inverter to reduce power dissipation. • Lower capacitance penalty at input to OTA5 • Reduced coupling between input and output

  11. Gray Code Counter • Binary counters have multiple bits changing simultaneously. • Gray code counters have single bit changing at a time. • Avoids missing codes and glitches in the output due to multiple bits toggling.

  12. Novel Gray Counter with Carry Look Ahead • A new 12-bit Gray-code counter. • Includes carry look ahead technique • Clock skew problem is reduced • No feedback from MSB to LSB, hence improved frequency of operation

  13. Gray Code Counter Ramp Generator Comparators Digital Chip Photograph and Layout • 4-channel ADC implemented in AMI 0.5-µm process • Total area including pad frame: 1.5 mm x 1.5 mm. • Integrating capacitor off chip due to space constraint

  14. Section IIIMeasurementsTest SetupTest Results

  15. Test Board

  16. Differential Nonlinearity (DNL)Integral Nonlinearity (INL) • Monotonicity of the ADC. • Units in LSB (Least significant bit) • DNL < 0.5 LSB for optimum performance • INL net effect of the DNL • INL < 0.5 LSB for optimum performance.

  17. Results for DNL and INL • DNL < 0.5 LSB • INL > 0.5 LSB Histogram techniques used to measure DNL and INL. Four million samples collected with an input sine wave, digitized output compared with ideal sine wave histogram

  18. Ramp Generator Analysis • Plot of the two inputs of OTA shows • P-input linearity >12 bits (Blue) • N-input linearity <12 bits (Green) • A possible new OTA with higher linearity can be used in place of the simple differential pair.

  19. Original Contributions • Novel 12-bit Multi-channel Current-Mode Wilkinson ADC architecture • Temperature independent Ramp signal generator • Gray-code counter without feedback or clock skew effects • Improved current comparator design

  20. Conclusions • A new Wilkinson-style (integrating) multi-channel current-mode ADC architecture is described. • The design blocks of the ADC were described. • Ramp Generator • Current Comparator • Gray Code Counter • Test setup was described • Parameters of the ADC • Test results • Suggested improvements

  21. Thank You Questions?

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