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Arithmetic in Computers

Arithmetic in Computers. Outline. Data representation integers Unsigned integers Signed integers Floating-points Addition and subtraction Multiplication Division Floating-point operations. Address:N N+1 N+2 N+3.

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Arithmetic in Computers

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  1. Arithmetic in Computers

  2. Outline • Data representation • integers • Unsigned integers • Signed integers • Floating-points • Addition and subtraction • Multiplication • Division • Floating-point operations Chapter 4 Arithmetic in Computers

  3. Address:N N+1 N+2 N+3 Address:N N+1 N+2 N+3 0000 1011 1110 1011 1100 0010 0000 0000 0000 0000 1100 0010 1110 1011 0000 1011 Unsigned integers • Binary representation in a word (4-bytes) • Byte Ordering • 200000000 is represented as follows 0000 1011 1110 1011 1100 0010 0000 0000 • How to store it in memory addressed N • Big Endian (big end is stored first) • Little Endian(little end is stored first) Chapter 4 Arithmetic in Computers

  4. Sign and magnitude representation Problems 2 representations of zero +0: 00000…000 -0: 10000…000 More complex adder 2’s complement representation Example: 4-bit representation 0000 01000 -8 0001 1 1001 -7 0010 21010 -6 0011 3 1011 -5 0100 41100 -4 0101 5 1101 -3 0110 61110 -2 0111 7 1111 -1 Problems The sizes of largest positive and smallest negative are different by 1. Signed Integers Same as sign and magnitude representation Chapter 4 Arithmetic in Computers

  5. Converting 2’s complement binary • What is the 2’s complement representation of -3? • Using 8-bit representation, 3 is 0000 0011. • To get 2’s complement representation of -3 0000 0011 (3) bitwise complement 1111 1100 add 1 1111 1101 Chapter 4 Arithmetic in Computers

  6. For n-bit 2’s complement bn-1 bn-2 … b1 b0 Value: -bn-12n-1 + ∑ 0n-2bi2i Ex: 1110 0111 represents the value -1000 0000 + 110 0111 = -128 + 103 = -25 If bn-1=0, the value 0 (i.e. ∑ 0n-2bi2i) If bn-1=1, the value <0 (i.e. ∑ 0n-2bi2i – 2n-1) For n-bit 2’s complement bn-1 bn-2 … b1 b0 Value: if bn-1=0 (bn-2 … b1 b0)2 if bn-1=1 Negative of the value of 2’s complement of (bn-2 … b1 b0)2 Ex: Consider 1110 0111. 2’s complement of 110 0111 is (001 1000 + 1) = 001 1001, which is 25. 1110 0111 represents -25. Calculate value from 2’s complement Chapter 4 Arithmetic in Computers

  7. Advantages of 2’s complement representation • Only one representation of zero. • Most significant bit acts as sign bit. • 2’s complement of 2’s complement of x is x. • Simple for hardware design. Chapter 4 Arithmetic in Computers

  8. Sign Extension In machine code, addi $t0, $t0, -3 is • Tocopy -3 (FFFD) to be added to $t0, -3 needed to be extended to 32 bits (4 bytes). • It is not possible to put 0’s in the upper 2 bytes • Put 1’s in the upper 2 bytes ? ? ? ? F F F D F F F D 0 0 0 0 F F F D F F F D F F F F F F F D F F F D Chapter 4 Arithmetic in Computers

  9. Sign Extension • Other operations which require sign extension. • Load /store byte • Load/store halfword Chapter 4 Arithmetic in Computers

  10. Binary addition/subtraction 0110 1100 108 0011 1101 + 61 + 1010 1001169 0110 1100 108 0011 1101 - 61 - 0010 111147 0011 1101 61 0110 1100 - 108 - 1101 0001-47 2’s complement addition/subtraction 0110 1100 108 0011 1101 + 61 + 1010 1001169 0110 1100 108 1100 0011 + -61 + 0010 111147 0011 1101 61 1001 0100 + -108 + 1101 0001-47 Addition & Subtraction Chapter 4 Arithmetic in Computers

  11. n-bit adder n-bit subtractor yn-1 yn-2 y1 y0 yn-1 yn-2 y1 y0 xn-1 xn-2 x1 x0 xn-1 xn-2 x1 x0 … … … … n-bit adder n-bit adder Cin Cout 0 Cin Cout 1 … … zn-1 zn-2 z1 z0 zn-1 zn-2 z1 z0 Chapter 4 Arithmetic in Computers

  12. Adder/ subtractor yn-1 yn-2 y1 y0 sub xn-1 xn-2 x1 x0 … n-bit adder Cout Cin … zn-1 zn-2 z1 z0 Chapter 4 Arithmetic in Computers

  13. Overflow Overflow occurs when the result of an operation is too large to fit in a word. Chapter 4 Arithmetic in Computers

  14. Multiplication 01011001 5916 00101011x2B16x 01011001 3D3 01011001 B2 00000000 EF3 01011001 00000000 01011001 0111011110011 Chapter 4 Arithmetic in Computers

  15. Multiplication Algorithm START Result=0; loop=0 F Multiplier0=0? Add Multiplicand to Result T Shift left Multiplicand once; Shift right Multiplier once; Increment loop T loop<32? F STOP Chapter 4 Arithmetic in Computers

  16. Multiplier (32-bit shift-right register) Hardware: Sequential Multiplication Multiplicand (64-bit shift-left register) 64-bit ALU test 32 loops Result (64-bit register) test Multiplier0 Chapter 4 Arithmetic in Computers

  17. 32-bit adder 32-bit adder 32-bit adder 32-bit adder 32-bit adder Hardware: Parallel Multiplication Mplier1 ·Mcand Mplier0 ·Mcand 01011001(Mcand) 00101011(Mplier)x 01011001 01011001 00000000 01011001 00000000 01011001 0111011110011 Mplier2 ·Mcand 32 bit 1 bit Mplier3 ·Mcand 32 bit 1 bit Mplier30 ·Mcand prdt0 32 bit 1 bit Mplier31 ·Mcand . . . prdt1 32 bit 1 bit prdt2 32 bit 1 bit prdt3 prdt30 prdt63-31 Chapter 4 Arithmetic in Computers

  18. Division 11101 1010 )100100101 1010 10000 1010 1101 1010 110 000 1101 1010 11 Chapter 4 Arithmetic in Computers

  19. Division Algorithm Initialization: Quotient = 0 Remainder = Dividen Divisor = Divisor<<32 Loop = 1 START Remainder = Remainder – Divisor F T Remainder<0? Shift left Quotient and set rightmost bit to 0 Restore Remainder Shift left Quotient and set rightmost bit to 1 Shift right divisor once; Increment Loop T loop<33? F STOP Chapter 4 Arithmetic in Computers

  20. Execution Round 1 3 8 2 5 6 7 4 Sol: 1000110100101101 remainder 0111 0000 1111 0000 1111 0000 1111 0000 0000 0100 0010 0100 1001 0000 1111 0000 0000 0000 1111 0001 0110 0000 1111 0000 0000 1010 1000 1010 1111 0000 1111 0000 divisor 1100 1100 1100 1100 0000 0000 0000 0000 0000 1100 1100 1100 1100 0000 0000 0000 0000 0011 0011 0011 0011 0000 0000 0000 0000 0001 1001 1001 1001 1000 0000 0000 0000 0110 0110 0110 0110 0000 0000 0000 0011 0011 0011 0011 0000 0000 0000 0000 0000 0000 1100 1100 1100 1100 0000 0000 0001 1001 1001 1001 1000 0000 0000 0000 0110 0110 0110 0110 0000 0000 0000 0000 quotient 0000 0000 0000 0000 0000 0000 0010 0011 0000 0000 0000 0010 0000 0000 0000 1000 0000 0000 0000 0100 0000 0000 0100 0110 0000 0000 0000 0001 0000 0000 0001 0001 Chapter 4 Arithmetic in Computers

  21. Quotient (32-bit shift-left register) Hardware: Division Divisor (64-bit shift-right register) 64-bit ALU test 33 loops Remainder (64-bit register) test Remainder Chapter 4 Arithmetic in Computers

  22. Improved Hardware: Division Divisor (32-bit shift-right register) 32-bit ALU test Remainder (64-bit register) Chapter 4 Arithmetic in Computers

  23. E = exponent – bias If bias=127. 000…0 represents -127 00…01 represents -1 011…1 represents 0 100…0 represents 1 11…10 represents 127 F=1.xxxxxxxxx2 Normalized number Floating-point Representation (-1)s F  2E exponent fraction sign Normalization is needed. Why can’t 2’s complement be used? What does 111…1 represents? Chapter 4 Arithmetic in Computers

  24. IEEE 754 floating point standard (-1)s F  2E Single precision (bias=127) exponent fraction sign Double precision (bias=1023) exponent fraction sign fraction Chapter 4 Arithmetic in Computers

  25. Floating-point value Single precision exponent fraction sign Value=(-1)sign (1.b22b21…b0)2 2((b30b29…b23)2 -bias) Chapter 4 Arithmetic in Computers

  26. Normalization • If a floating-point is in the form of 0.xxx  2yyy, it is denormalized. • To normalized F  2E Repeat { F=F<<1 E=E-1 } until the MSB of F is 1 F=F<<1 E=E-1 Chapter 4 Arithmetic in Computers

  27. Range Max. number, min. number Precision The last digit represented in the number Special values (IEEE standard)  exponent =(1…1)2 reserved Fraction = 0 NaN (Not a Number) exponent =(1…1)2 reserved Fraction  0 Overflow occurs when the positive exponent is too large. Underflow occurs when the negativeexponent is too large. Special Cases for Floating-point Chapter 4 Arithmetic in Computers

  28. Floating-Point Addition Let X= F2B and Y= G2D , where F=1.A, G= 1.C • To add X and Y • If B<D • find G’=G2D-B and Y= G2D =G’2B. • Z = (F+G’)  2B. • If B>D • find F’=F2B-D and X= F2B =F’2D. • Z = (F’+G)  2D. • If B=D • Z = (F+G)  2B. • Finally, normalized Z. Chapter 4 Arithmetic in Computers

  29. Floating-Point Multiplication Let X= F2B and Y= G2D , where F=1.A, G= 1.C Let Z= X  Y = F2BG2D = (FG)  2B+D . • To multiply X and Y • find FG, and B+D. • Z = (F+G)  2B+D. • Finally, normalized Z. Chapter 4 Arithmetic in Computers

  30. Floating point operand in MIPS • 32 floating-point registers • $f0, $f1, …, $f31 • Size of each register = 32 bits • 1 single-precision data can be stored in 1 floating-point register. • 1 double-precision data must be stored in a pair of floating-point registers. • For double-precision data, $f0 refers to the pair $f0,$f1. Chapter 4 Arithmetic in Computers

  31. Floating-point Arithmetic Chapter 4 Arithmetic in Computers

  32. Floating-point Data Transfer Chapter 4 Arithmetic in Computers

  33. Floating-point Comparison Chapter 4 Arithmetic in Computers

  34. Note • Data and program are stored in memory. • How to interpret what a bit sequence means depends on what it represents • An assembly instruction • See Instruction formats, fields, op codes • Data • Unsigned integers: binary numbers • Signed integers : 2’s complement numbers • Floating-points: • Exponent • Fraction • Sign Chapter 4 Arithmetic in Computers

  35. Chapter 4 Arithmetic in Computers

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