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60-265 COMPUTER ARCHITECTURE I: Digital Design . Akshai Aggarwal. Course Outline Binary, Octal and Hexadecimal number system Digital logic and Boolean Algebra Combinational and sequential circuit design
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60-265 COMPUTER ARCHITECTURE I: Digital Design Akshai Aggarwal
Course Outline • Binary, Octal and Hexadecimal number system • Digital logic and Boolean Algebra • Combinational and sequential circuit design • Digital components: decoders, multiplexers, registers, • counters, memory etc.; Digital Integrated Circuits • Register transfer and micro-operations • Basic computer organization and design • CPU structure, control unit design, interrupt handling • HOW DOES A COMPUTER WORK? • Elementary assembly language instruction set and the execution process
Digital Computers • DIGITAL : information represented by variables that take a limited number of values • BINARY : - reliability of hardware • binary nature of human logic • DIGITAL COMPUTER: A discrete information processing system • A SYSTEM: An organized collection of components, that interact through communication links among themselves and with their environment to provide a predefined functionality.
ARRAYS OF BITS: • 1001011 may represent • 75 in decimal, or • K in ASCII code or • some control code.
History: ENIAC Electrical Numerical Integrator And Computer (ENIAC): • developed by Professor John Mauchly and his graduate student John Presper Eckert • For army’s Ballistic Research Lab for calculating range and trajectory tables for new weapons • Start 1943; development completed in 1946; used for Nuclear bomb computations • 18000 vacuum tubes, 140 kW power, 30 ton, 1500 sq ft of floor space • Decimal machine; programming manually by setting switches and plugging and unplugging cables
1945: A New Project: Electronic Discrete Variable Computer (EDVAC) • EDVAC: planned by John Von Neumann as a Stored Program machine • Developed at Princeton Institute for Advanced Studies as the IAS computer from 1946 -1952 • consisted of • main memory • Arithmetic Logic Unit and Control Unit CPU • Registers in CPU: Accumulator, Address Register, Program Counter, Data Register and other Registers • Input/Output • Used binary numbers
FUNCTIONAL PARTS: • - hardware: CPU, memory, I/O units • -software • System software • Application program • Logical view vs. Physical components
Architecture Architecture of a computer: • those properties, which directly affect the logical working of a program; • the attributes, which are apparent to a programmer Examples: instruction set, number of bits used to represent data
Von Neumann Architecture of a digital computer: Von Neumann Architecture of a Digital Computer Memory Central processing unit Input Output Devices I/O Processor
Computer Architecture: • Structure and behavior of the computer as seen by • the user. • It includes: • Instruction set. • Information formats. • Techniques for addressing memory. • The course is an introduction to the three aspects.
Organization • Organization: operational units and their interconnection for realizing the architectural specifications • Determination of which hardware should be used and • how the parts should be connected together
Logic Gates and Boolean Algebra: 1832: 17 years old Boole: inspired to put logical statements in a mathematical form 1854: ‘The Laws of thought’ - George Boole. “An investigation of the laws of thought, on which are founded the Mathematical Theories of Logic and Probabilities” Binary Variables: Logic Operations – Truth Table, logic diagram, Boolean Expressions.
Objectives of Boole • to investigate the fundamental laws of those operations of the mind by which reasoning is performed; • to give expression to them in the symbolic language of a Calculus • to deduce, from these studies, some probable imitations concerning the nature and constitution of the human mind.
The Values of Boole’s variables • "the Universe" and "Nothing" • “True” and “False” • 1 and 0 Boole thought: Boole’s Algebra: represented mathematical systemization of human thought. Not true. But thinking about machines, which think like a human being powerful machines.
Hollerith IBM • 1881:Mechanical Engineer at American Census Bureau, Washington: devised a punched card system for processing the census data of 1890 – the idea from his boss, John Shaw Billings • 1882-83: Instructor at MIT • 1896: Hollerith’s Tabulating Machines Company International Business Machines
Logic gates: Buffer gate Inverter or NOT gate Logic SymbolTruth TableAlgebraic Expression A Out – A, A’ Out 0 1 1 0 A NOT gate
Gates (continued): AND and OR GATES Logic SymbolTruth TableAlgebraic Expression A B Out A B • 0 0 • 0 1 • 0 • 1 1 0 0 0 1 A.B, AB, A*B, A^B Out AND Out A B • 0 0 • 0 1 • 0 • 1 1 0 1 1 1 A+B, AvB A B Out OR
Gates (continued): XOR and NAND gates Logic symbolTruth TableAlgebraic Expression A B Out • 0 0 • 0 1 • 0 • 1 1 0 1 1 0 A B A B Out XOR A B Out A.B, (AB)’ • 0 0 • 0 1 • 0 • 1 1 1 1 1 0 A B Out NAND
Gates (continued): NOR and XNOR gates Logical SymbolTruth TableAlgebraic Expression A B Out • 0 0 • 0 1 • 0 • 1 1 1 0 0 0 A B Out A + B NOR Out A B • 0 0 • 0 1 • 0 • 1 1 1 0 0 1 A B Out A B XNOR
Boolean Gates • Gates: • AND, OR, NOT • XOR, XNOR • NAND, NOR • Buffer • NOT and Buffer are single-input gates. • All the others are multi-input gates. The number of inputs to a gate is known as its Fan-in.
Boolean Algebra • Boolean Algebra uses Boolean variables. • A Boolean variable can have only two possible values: 0 or 1. • Boolean operations: any of the operations defined by logic gates • Property of CLOSURE: If A and B are Boolean variables, A + B and A.B are also Boolean variables.
Identity Element • identity element (or neutral element) is a special type of element of a set with respect to a binary operation on that set. It leaves other elements unchanged when combined with them. This is used for groups and related concepts. (Ref: http://en.wikipedia.org/wiki/Identity_element) • OR operation: 0 is the Identity Element for OR: 1 + 0 = 1; 0 + 0 = 0 • AND operation: 1 is the Identity Element for AND: 1.1 = 1; 0.1 = 0
Example 7(b): A few comments: 7(b) x + yz = (x + y)(x + Z) RHS = x + xy + xz + yz = x(1 + y + z) + yz = x + yz = LHS
De Morgan’s Theorem: De Morgan’s Theorems 8(a) (x + y)’ = x’.y’ F X Y X y F NOR NOR
Continuation of the proof: De’ Morgan’s theorem Proof:
Another Method for proving De Morgan’s theorem …1 • Identity 4(a): A + A’ = 1 • Identity 4(b): A.A’ = 0 • To prove: A is the complement of B prove that (i) A + B = 1 and (ii) A.B = 0 • To prove: (x + y)’ = x’.y’, consider A = x’.y’ and B = x + y; Prove that (i) x’.y’ + (x + y) = 1 and (ii) x’.y’.(x + y) = 0 A is the complement of B.
Another Method for proving De Morgan’s theorem …2 Proof: (i) LHS = x’.y’ + (x + y) = (x’.y’ + x) + y = x + y’ + y by using Th. 11(a) = x + 1 by using Th. 4(a) = 1 by using Th. 2(a) (ii) LHS = x’.y’.(x + y) = x.x’.y’ + x’.y’.y = 0.y’ + x’.0 by using Th. 4(b) = 0 Hence (x + y)’ = x’.y’.
Examples 8(b) and 10 (b): 8(b) (x y)’ = x’ + y’; The proof is similar to that for 8(a). 10(b) LHS = x (x + y) = x + xy = x (1 + y) = x = RHS
Examples 11(a): 11 (a) LHS = x + x’y Use x = x.(1 + y) by using 1 + y = 1 and x.1 = x = x + x.y = x.x + x.y by using x = x.x = x.x + x.y + x.x’ by using x.x’ = 0 and A + 0 = A LHS = (x.x + x.y + x.x’) + x’.y = x.(x + y) + x’.(x + y) = (x + x’).(x + y) = x + y by using x + x’ = 1 and 1.B = B
Examples 11(b) and 12: 11(b) x.(x’ + y) = x.x’ + x.y = x.y by using x.x’ = 0 and 0 + A = A 12 (b) (x + y).(x + y’) = x + x.y’ + x.y + y.y’ = x.(1 + y’ + x) by using x.x’ = 0 and 0 + A = A = x by using 1 + y’ + x = 1 and x.1 = x
Example 13: 13 (a) LHS = x.y + x’.z + y.z = x.y + x’.z + (x + x’).y.z = x.y.(1 + z) + x’.z.(1 + y) = xy + x’z = RHS 13 (b) LHS = (x + y).(x’ + z).(y + z) = (x.y + x.z + y + y.z).(x’ + z) = (x.z + y.(1 + x + z)). (x’ + z) = (y + x.z).(x’ + z) = x’.y + y.z + x.x’.z + x.z = xx’ + x’y + yz + xz = x’.(x + y) + z.(x + y) = (x + y).(x’ + z) = RHS
Boolean Algebra • Closure: X + Y, X.Y • Identity Element: 0, 1 • Commutation: X + Y = Y + X, X.Y = Y.X • Distribution: X.(Y + Z) = X.Y + X.Z, X + (Y.Z) = (X + Y).(X + Z) • Complements: X + X’ = 1, X.X’ = 0 • Idempotency X + X = X, X.X = X