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Power Converters and Drives Lab -a Research Overview

Power Converters and Drives Lab -a Research Overview. Prof. K. Gopakumar Centre for Electronics Design and Technology Indian Institute of Science, Bangalore INDIA: 560012. Conventional two-level inverter structure. S 1. S 3. S 5. B1. C1. A1. V dc. S 4. S 6. S 2. Induction motor.

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Power Converters and Drives Lab -a Research Overview

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  1. Power Converters and Drives Lab -a Research Overview Prof. K. Gopakumar Centre for Electronics Design and Technology Indian Institute of Science, Bangalore INDIA: 560012 CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  2. Conventional two-level inverter structure S1 S3 S5 B1 C1 A1 Vdc S4 S6 S2 Induction motor CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  3. V V bs SVPWM for conventional two-level inverter V cs as V /2 dc C1 0 -V /2 dc wt CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  4. v v v AN BN CN 0.5 Reference signals and carrier Vt -0.5 V /2 dc a0 V -V /2 dc V /2 dc b0 V -V /2 dc V /2 dc c0 V -V /2 2 π 3 π/2 (wt) π/2 π dc Pole voltage waveforms in conventional two-level inverter CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  5. Multilevel inverters Topologies Inverter topologies cascading two level inverters Inverter topologies with open-end IM drive Inverter topologies with asymmetric DC link voltages Multilevel inverter topologies for common mode voltage elimination Two-level inverter scheme with common mode voltage elimination Higher level of multilevel inverter scheme DC-link capacitor voltage balancing winding induction motor drive Three-level structure with single power supply PWM signal generation for multilevel inverter A Space Phasor Based Self Adaptive Current Hysteresis Controller Multi-phase (six-phase) and multi motor drive Sensorless control scheme for IM drive 12-sided polygonal voltage space phasor generation. Presentation outline CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  6. Multilevel inverters CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  7. Advantages of multilevel inverters over the two-level inverters • Synthesis of higher voltage levels using power devices of lower • voltage ratings • Increased number of voltage levels which leads to better voltage • waveforms and reduced Total Harmonic Distortion (THD) in voltage • Reduced switching stresses on the devices CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  8. Neutral clamped inverter topology for 3-level inversion + S11 S21 S31 C1 S22 S12 S32 Vdc o C A B 3-ph Ac mains C2 S13 S23 S33 S14 _ S24 S34 • The neutral point fluctuates as the capacitors C1 and C2 carry load currents • Bulkier capacitors are needed to check the neutral point fluctuation • PWM strategies aim to balance the neutral point dynamically CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  9. Dual Inverter fed induction motor with open end winding CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  10. Dual Inverter fed induction motor with open end winding Inverter-II Inverter-I Vdc/4 a’ o a b’ b c’ c Vdc/4 3-ph IM with open wdg. • The neutral point of the conventional IM is opened and is fed from both sides. • The DC - bus voltage is Vdc/2 . CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  11. (-+-) 3’ 2’ (++-) (-+-) 3 2 (++-) (---) 8’ 7’ (+++) (---) 8 7 (+++) 1’ (+--) (-++) 4 1 (+--) (-++) 4’ 6’ (+-+) 6 (+-+) (--+) 5’ (--+) 5 Vdc/2 Vdc/2 Space phasor locations for Inverter-I (Left) and Inverter-II (Right) CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  12. Voltage space phasor combinations from the dual inverter scheme • A total of 64 space phasor combinations are available CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  13. Dual Inverter fed induction motor with open end winding with isolated DC power supply a’ a Vdc/2 Vdc/2 b b’ c’ c IM with open-end winding Inverter - 1 Inverter - 2 • Triplen harmonic suppression is achieved through the transformer isolation. CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  14. A new three-level inverter circuit topology cascading two two-level inverters CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  15. The power circuit configuration of a three-level inverter cascading conventional two two-level inverters CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  16. Space vector locations of the proposed three-level inverter Similar to the conventional three-level inverter CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  17. Salient features of the proposed three-level inverter configuration • The power Bus structure is simple • Can work as a conventional 2-level inverter in the lower voltage range • The total VA rating of the the transformers is the same as that of the NPC configuration • High voltage fast recovery diodes are not needed • Three devices need to support the total DC bus voltage CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  18. Phase voltage Pole Voltage waveforms of Inverter-1 (Top) and Inverter-2 (Bottom) Phase current at no-load |Vsr| = 0.4Vdc Experimental results: lower modulation range A1 Vdc/2 = 150V Vdc/2 = 150V A2 O CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  19. Phase voltage Pole Voltage waveforms of Inverter-1 (Top) and Inverter-2 (Bottom) Phase current at no-load |Vsr| = 0.6Vdc Experimental results: higher modulation range CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  20. Experimental results: over modulation range Phase voltage Pole Voltage waveforms of Inverter-1 (Top) and Inverter-2 (Bottom) |Vsr| = Vdc (Over-modulation) Phase current at no-load CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  21. A new five-level inverter circuit topology cascading two three-level inverters CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  22. Introduction • An inverter system for open-end winding induction motor is presented. • Open-end winding IM is fed by two three-level inverters • The 3-level inverters are realised by cascading two 2-level inverters • This inverter scheme results in space phasor locations similar to a conventional Five-level Inverter CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  23. Inverter A Inverter B INV 3 INV 1 S13 S11 S15 S33 S35 S31 + + + + C1 C3 C3 B3 A3 A1 B1 C1 Vdc/4 Vdc/4 Vdc/4 S32 S36 S34 S16 S14 S12 - - - S25 S21 S23 S43 S45 S41 C2 C4 S5’ C2 C4 Vdc/4 B2 B4 A2 A4 IM S24 S26 S22 S42 S46 S44 - INV 2 INV 4 O O’ Inverter A Inverter B INV1,INV2 INV3,INV4 The schematic for the proposed five-level drive • Inverter A and Inverter B are 3-level inverters • Each three level is formed by cascading two 2-level inverters CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  24. Inverter A INV 1 S11 S13 S15 + + Levels in A-leg ( VA2O ) C1 Vdc/4 A1 B1 C1 0 when S24 is on Vdc/4 when S21 and S14 on S14 S16 S12 Vdc/2 when - S21 and S11 on S21 S25 S23 C2 S5’ Vdc/4 C2 B2 A2 VA2O S24 S26 S22 - INV 2 O The 3-level inverter topology • The 2-level inverters have DC-link of • This 3-level structure does not require neutral point clamping diodes Vdc/4 CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  25. VA2A4= VA20- VA40’ -Vdc/2 ( L1) -Vdc/4 ( L2) 0 ( L3) Vdc/4 ( L4) Vdc/2 ( L5) VA20 VA40’ Vdc/2 Vdc/4 0 0 0 0 0 0 Vdc/4 Vdc/2 Realization of five voltage levels across motor phases • All legs of the three-level inverter can independently take any of the three levels • when inverter-A and inverter-B are switched independently 5-levels can be generated across the winding. * for the first three levels only Inverter-B is switching CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  26. Space vector representation of the proposed Drive • Similar to a five-level inverter • 125 space vector combinations • 96 sectors • 61 locations • Four layers CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  27. The Modulation scheme Multi-carrier PWM method is used Four triangular carriers 20% third harmonic added to the 3 reference signals A discreet DC shift is given to the reference signals depending on the speed range With this modulating scheme the inverter starts with 2-level operation and then moves to 3-level, 4-level and 5-level operation as speed increases CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  28. Conventional SPWM For Low modulation index • The reference wave set is placed at • the middle of the carrier set • Three levels are involved, therefore • three-level waveform SPWM for the proposed Drive • The reference wave set is placed at • the middle of the lowermost carrier • Only two levels are involved, therefore • two-level waveform • Only INV3 is switching ( the top • 2-level inverter of Inverter-B) • hence losses are only due to INV3 CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  29. Conventional SPWM For next speed range (Vc /2< Vm <Vc ) Vc : Peak to peak amplitude of the carrier Vm : Peak amplitude of the reference wave SPWM for the proposed Drive • The reference wave set is placed at • the middle of the lower two carriers • Three levels are involved, therefore • three-level waveform • Only INV4 and INV3 are switching • (2-level inverters of Inverter-B) • losses are only due to Inverter-B CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  30. For next speed range (Vc <Vm<3Vc/2 ) Conventional SPWM • Five levels are involved, therefore • five-level waveform • All the 2-level inverters have to • be switched SPWM for the proposed Drive • The reference wave set is placed at • the middle of second carrier ( C2) • Four levels are involved, • therefore four-level waveform • Only INV2, INV4 and INV3 are • switching • INV1 is not switching CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  31. For the maximum speed range ( Vm> 3Vc/2 ) • The reference set is at the center of the carrier set • All the Five-levels are involved • All the inverters have to be switched CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  32. 2-Level operation • Phase voltage shows 2-level waveform Motor phase voltage during 2-level operation • Inverter-B,is switching between Vdc/2 and Vdc/4 ( 200V and 100V) • This is due to the switching of INV3 ( top inverter of Inverter-B). INV4 is clamped. Pole voltage of Inverter-B during 2-level operation • Inverter-A is clamped to zero Pole voltage of Inverter-A during 2-level operation CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  33. 3-Level operation • Motor Phase Voltage shows 3-level waveform • Inverter-B is switching as 3-level inverter (200V,100V,0V) • Both the 2-level inverters of Inverter-B ( INV3 and INV4 are switching) • Inverter-A still clamped to zero Motor phase voltage during 3-level operation Pole voltage of Inverter-B during 3-level operation CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  34. 4-Level operation • Motor Phase Voltage shows 4-level waveform Motor phase voltage during 4-level operation • Inverter-B is switching as 3-level inverter (200V,100V,0V) • Inverter-A is switching as 2-level inverter (100V,0V) • This is due to the switching of INV2( bottom 2-level inverter ) Pole voltage of Inverter-B Pole voltage of Inverter-A CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  35. 5-Level operation • Motor Phase Voltage shows 5-level waveform • Inverter-B is switching as 3-level inverter (200V,100V,0V) Motor phase voltage during 5-level operation • Inverter-A is also switching as 3-level inverter (200V,100V,0V) Pole voltages of Inverter-A (top) and Inverter B (bottom) [ experimental results] Pole voltages of Inverter-A and Inverter B Showing the phase relation (simulation results) CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  36. Motor phase current 2-level operation 3-level operation 4-level operation 5-level operation CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  37. Salient Features Feeding the open-end winding induction motor by 3-level inverters, results in voltage space phasors similar to a 5-level inverter The three level inverters used are realised by cascading Two 2-level inverters. This structure does not require neutral Clamping diodes . Compared with series connected H-bridge topology, the proposed drive scheme uses less number of power Supplies ( four against six required for H-bridge). CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  38. Open end winding IM drive (Three level operation) with a single DC link CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  39. Dual Inverter fed induction motor with open end winding with isolated DC power supply a’ a Vdc/2 Vdc/2 b b’ c’ c IM with open-end winding Inverter - 1 Inverter - 2 • Triplen harmonic suppression is achieved through the transformer isolation. • All the 64 - space phasor combinations can be used in this case. • The transformers are bulky and expensive. CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  40. Triplen harmonic contribution from various space- vector combinations (Twenty combinations are available with a triplen harmonic content of zero) CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  41. Space phasor combinations with zero triplen harmonic contribution CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  42. + Aux. Sw1 Aux. Sw2 Vdc C2 C1 3-ph Open-end winding IM Inv.1 Inv.2 Aux. Sw4 Aux. Sw3 - Proposed power circuit schematic (switched neutral) • Auxiliary switches SW 1 and SW 3 are opened when inverter-1 assume states 7 or 8.( switched neutral) • Auxiliary switches SW 2 and SW 4 are opened when inverter-2 assume states 7’ or 8’. • For “safe” combinations auxiliary switches are kept closed. CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  43. Title • Space phasor combinations used in the proposed control strategy • Space phasor locations G,I,K,M,P,Q and R are forbidden. • For combinations at H,J,L,N,Q and S the auxiliary switches need not be opened ( safe states). • Other combinations have a zero state at one end. Appropriate auxiliary switches are opened to achievetriplen harmonic suppression CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  44. Pole voltages of individual inverters and the phase voltage (middle) with triplen content when |Vsr| = 0.4Vdc Actual motor phase voltage (left) and the motor phase current (right) when |Vsr| = 0.4Vdc Experimental results CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  45. Experimental results Pole voltages of individual inverters and the phase voltage (middle) with triplen content when |Vsr| = 0.6Vdc Actual motor phase voltage (left) and the motor phase current (right) when |Vsr| = 0.6Vdc CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  46. Experimental results Pole voltages of individual inverters and the phase voltage (middle) with triplen content when |Vsr| = 0.9Vdc Actual motor phase voltage (left) and the motor phase current (right) when |Vsr| = 0.9Vdc CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  47. A Dual Two Level Inverter Scheme for an Open-end winding Induction Motor Drive with a Single DC Power Supply and improved DC bus Utilization CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  48. K I 8 V2 14 15 C L H B V1 V2 V1 D 16 M A G O 13 E F N S 17 18 R P • The extreme vertices G, I, K, M, P and R are not switched. • The DC-bus utilization is lower by about 15% • Only 40 out of the 64 space vector combinations are used. CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  49. Salient features of the switching strategy • The triplen harmonic currents are denied a path by turning off the auxiliary switches. • The auxiliary switch pairs toggle in this switching strategy with a fixed frequency. • At a time only one inverter is connected to the DC link • The DC-bus utilization is enhanced by about 15% compared to the earlier switching strategy. CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

  50. (SW1,SW3) and (SW2, SW4) toggle at a fixed frequency CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA

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