FPGA-Based Arcade Emulation

1. FPGA-Based Arcade Emulation Danny Funk, Cory Mohling, Tony Milosch, David Gartner, John Alexander Advisor: Philip Jones Client: Joseph Zambreno

2. Project Objective • Goal • Showcase the capabilities of reconfigurable computing platforms • Problem • Continue 09/10 Senior Design team’s NES Emulation through FPGA • Create Arcade Machine that can be put on display

3. Conceptual Sketch Boot Loader Controls (I/O)

4. Functional Requirements FPGA • FR 1.1 – All NES specific emulation must be performed entirely in hardware. • FR 1.2 – Emulation must be contained within the FPGA Xilinx570X board.

5. Functional Requirements Emulator • FR 2.1 – Emulator must support the instruction set used by the original NES system. • FR 2.2 – Emulator must be able to run a NES ROM file from an outside source.

6. Functional Requirements I/O - Controls • FR 3.1.1 – Emulator must accept input from arcade style controls. • FR 3.1.2 – Emulator must accept input from NES controllers. • FR 3.1.3 – Emulator must respond to controller input with the same latency as the original NES. • FR 3.1.4 – Emulator must accept controls for up to two players.

7. Functional Requirements I/O – Video • FR 3.2.1 – System must be able to display images to a connected display. • FR 3.2.2 – System must output video to a screen at the original NES frame rate. • FR 3.2.3 – Emulator must use a color palette consistent with the original NES color palette. • FR 3.2.4 – Must be compatible with VGA Output.

8. Functional Requirements I/O – Audio • FR 3.3.1 – Emulator must generate background music for NES games. • FR 3.3.2 – Emulator must generate sound effects with the same latency as the original NES.

9. Functional Requirements Boot Loader • FR 4.1 – Must be able to display a selectable list of games to the connected display. • FR 4.2 – Must be able to load the selected ROM file to the emulator without modifying the FPGA.

10. Functional Requirements Cabinet • FR 5.1 – Cabinet must be able to support a 103 lb. monitor. • FR 5.2 – Cabinet must accept a standard 120 VAC source to power the system.

11. Non-Functional Requirements • NFR 1.1 – Emulator must be contained within a removable control box. • NFR 1.2 – All components of the emulator should be implemented as independent modules. • NFR 1.3 – The Cabinet should be sturdy enough to resist collapse under normal usage. • NFR 1.4 – The Cabinet should be able to fit through a 3’0” wide doorway. • NFR 1.5 – Users should be able to easily understand how to play a game without off-screen instructions.

12. Considerations • Constraints • System has to be designed around NES ROM files and NES instruction set • Only a limited amount of logic on FPGA board • Cabinet should be able to be moved from building to building on campus • Technology • Using new monitor technology with old NES • Interfacing with arcade controls

13. Market Survey • Another project currently exists (Veri NES). The source is not available. • Various software emulators are available and will help with understanding the NES. • Researched how similar arcade cabinets have been built. • Took measurements of button layouts from original arcade cabinets.

14. Risks and Mitigations • Unfamiliarity with FPGA coding and NES Architecture • Research with assistance of advisor • Audio may require CPU to be rewritten • Start early on Audio • Unforeseen extra design required • Start Early on FPGA work • Little experience with woodworking • Seek outside advice and make detailed blueprints

15. Cost Estimate Grand Total: $31099.40

16. System Decomposition Breakdown FPGA CPU PPU Video output Controller Input Boot loader Audio Cabinet Physical Controls Joystick Buttons Monitor

17. System Design • Controls • Develop an arcade style interface for the NES emulator • Create wire riggings for all the joysticks and buttons • Each button is mapped directly to the controller status register

18. System Design • Boot loader • Develop Boot loader using Microblaze Processor provided in Xilinx tools • Present user with easy to use game selection screen • Read NES Rom files from Compact Flash • Parse NES Rom file and load contents into appropriate system memory for the FPGA • Reset back to Boot loader screen when reset is pressed

19. System Design

20. System Design • Cabinet • Use Solid Works to design detailed cabinet drawings • Purchase custom marquees • Build out of ¾” plywood • Detachable Control Box • Coin Door • Hidden screw and nail holes

25. System Design • Audio • Write audio module that generates audio • Connect audio module to CPU • Map all audio related instructions from the CPU to the module • Connect audio module to AC97 to produce sound output • “A Implementation of the NES Audio Processing Unit” by CedomirSegulja and Bill Dai

26. System Design • PPU • Map CPU memory to PPU registers to allow for game scrolling • Implement Memory mappers to allow for more games to be played • PPU is implemented using a 14 stage finite state machine to render each pixel • Each pixel is stored in a buffer that is then sent to the VGA output

27. Test Plan • Test as we go • After each step, make sure that the game plays as expected • Simulate • Simulate incremental builds with ModelSim to ensure system works as expected • Final Test • Ensure all functional requirements are met, and debug as necessary.

28. Current Status • Side Scrolling – 80% • Control Input – 95% • Boot Loader – 40% • Cabinet Design – 100% • Cabinet Construction – 0% • Audio – 0%

29. Next Semester Plan • Start Construction of the Cabinet • Start implementing Audio • Complete implementation of boot Loader • Continue working on debugging current implementation so more games can run.

31. Task Responsibility

32. Questions