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COUNTERS WITH INPUTS. Inputs Mealy Outputs Mealy vs. Moore. Counters With Inputs. What if you don’t want counter to increment every single cycle?. D Q. D Q. An Incrementable Counter. Current State. State Memory. Next State. Input Forming Logic. Inputs.
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COUNTERS WITH INPUTS Inputs Mealy Outputs Mealy vs. Moore ECEn 224
Counters With Inputs • What if you don’t want counter to increment every single cycle? ECEn 224
D Q D Q An Incrementable Counter CurrentState StateMemory NextState InputFormingLogic Inputs Note that the next state is a function of the input ‘INC’ as well as the current state. ECEn 224
Incrementable Counter Derivation Doing the KMaps for this results in: N1 N0 N1 = INC•Q1’•Q0 + INC’•Q1 + Q1•Q0’ N0 = INC’•Q0 + INC•Q0’ = INCQ0 ECEn 224
Incrementable Counter Behavior CLK INC CurrentState 00 01 10 The counter increments on the clock edge only when INC is asserted ECEn 224
Counters With More Inputs CLR = INC = 0 No state transition CLR = 0 INC = 1 Counter Increments CLR = 1 INC = 0 Counter resets to ‘00’ CLR = 1 INC = 1 What should it do? ECEn 224
Counters With More Inputs CLR = INC = 0 No state transition CLR = 0 INC = 1 Counter Increments CLR = 1 INC = 0 Counter resets to ‘00’ CLR = 1 INC = 1 What should it do? ECEn 224
Precedence of INC vs. CLR? • Could do nothing • Could give INC precedence • Could give CLR precedence • Assume INC=CLR=1 will never occur You decide when you draw the transition table! ECEn 224
Case 1 – Do Nothing N1 N0 N1 = CLR’•INC•Q1’•Q0 + CLR’•INC’•Q1 + CLR•INC•Q1 + INC•Q1•Q0’ N0 = CLR’•INC’•Q0 + CLR•INC•Q0 + CLR’•INC•Q0’ ECEn 224
Case 2 – Give INC Precedence N1 N0 N1 = INC•Q1’•Q0 + CLR’•INC’•Q1 + INC•Q1•Q0’ N0 = CLR’•INC’•Q0 + INC•Q0’ ECEn 224
Case 3 – Give CLR Precedence N1 N0 N1 = CLR’•INC•Q1’•Q0 + CLR’•INC’•Q1 + CLR’•Q1•Q0’ N0 = CLR’•INC’•Q0 + CLR’•INC•Q0’ ECEn 224
Case 4 – Assume INC=CLR=1Will Never Occur N1 N0 N1 = CLR’•INC’•Q1 + INC•Q1’•Q0 + CLR’•Q1•Q0’ N0 = CLR’•INC’•Q0 + INC•Q0’ What happens in the real circuit when INC=CLR=1? It depends on the final equations… ECEn 224
Case 4 – When INC=CLR=1What Happens? N1 N0 N1 = CLR’•INC’•Q1 + INC•Q1’•Q0 + CLR’•Q1•Q0’ N0 = CLR’•INC’•Q0 + INC•Q0’ In the end, X’s in TT’s result in somepredictable behavior, you just don’tcare what that is… ECEn 224
Moore vs. MealySequential Machines ECEn 224
D Q D Q Moore Sequential Machine (static) • Outputs are a function of current state only CurrentState StateMemory NextState InputFormingLogic Inputs OutputFormingLogic Outputs ECEn 224
D Q D Q Mealy Sequential Machine (dynamic) • Outputs are a function of current state and inputs CurrentState StateMemory NextState InputFormingLogic Inputs OutputFormingLogic Outputs ECEn 224
Example: 2-Bit Counter ECEn 224
Example: 2-Bit Counter Moore outputs usually require multipleentries in TT. Mealy outputs often require only one. • Moore output Z is 1 when count=3 • Mealy output Y is 1 when count=3 and INC=1 • When incrementing from 3 back to 0 ECEn 224
Mealy vs. Moore Timing CLK INC Z output is TRUE whenever count=3(it is static functionof current state) Y output is TRUEwhenever count=3andINC=1(it is dynamic functionof current state and input) CurrentState 10 11 00 Z Y ECEn 224