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Virtual Systems Overview

Virtual Systems Overview. CS552. System Structure. user. user. user. user. user. user. • • • • •. O/S. O/S. Virtual Machine Monitor (The “real” O/S). Software modes. Privileged (“ kernel ” mode) Can do any instruction Can access any REAL memory

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Virtual Systems Overview

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  1. Virtual Systems Overview CS552

  2. System Structure user user user user user user • • • • • O/S O/S Virtual Machine Monitor (The “real” O/S)

  3. Software modes • Privileged (“kernel” mode) • Can do any instruction • Can access any REAL memory • Can set instruction counter • Can enable or disable HARDWARE interrupts • Can access real devices directly • Non-privileged (“user” mode) • NONE of the above is possible

  4. Interrupts • An event • A system service call • Device signaling to CPU • Programming error (e.g.; ÷ 0) • May be enabled or disabled • By privileged instructions • 80x86 - LMSW • z/390 - LPSW

  5. 80x86 flags Bit# Acronym Description 0 CF Carry flag 1 1 2 PF Parity 3 0 4 AF Auxiliary flag 5 0 6 ZF Zero flag 7 SF Sign flag 8 TP Trap flag (single step) 9 IF Interrupt flag A DF Direction flag B OF Overflow flag C,D IOPL IOPL I/O Privilege Level (286+ only) E NT Nested Task Flag (286+ only) F 0 10 RF Resume Flag (386+ only) 11 VM Virtual Mode Flag (386+ only) 12 AC Alignment Check (486SX+ only) 13 VIF Virtual Interrupt Flag (Pentium+) 14 VIP Virtual Interrupt Pending (Pentium+) 15 ID Indentification (Pentium+)

  6. z/390 Status Word Program Status Word Bits value description 0-5 0R0000 R=0 6 II=1 for I/O interrupts allowed 7 E E=1 for external ints allowed 8-11 xxxx memory protection key 12 1 13 C machine check mask (we will use 0) 14 W W=1 to force wait state 15 P P=1 for user mode (non-priv) 16-17 00 18-19 CC cond. code after compare 20-23 uuuu mask for s/w errors (÷ 0, etc) 24-31 0 32 A A=1 for 31 bit addressing 33-64 IC instruction counter value

  7. 80X86 Privileged Code Opcode Description CLI Clear Interrupt flag STI Set Interrupt flag LAHF Load AH from Flags (bits 0-7) SAHF Store AH into Flags (bits 0-7) POPF/POPD stack ops for flags PUSHF/PUSHD ”

  8. State switching upon I/0 interrupt • Device raises voltage on connection wires • Prevents all other interrupts • Forces current PSW values to be saved into I/O OLD PSW location in memory • Forces loading of I/O NEW PSW from memory • Kernel code activated at new IC value • Examines interrupt code in OLD PSW • Branch to location of interrupt handler in kernel • Handle interrupt in kernel • Load the I/O OLD PSW to return to user code

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