Course acquisition and tracking in DS/SS systems

Corso di Comunicazioni Mobili Course acquisition and tracking in DS/SS systems Prof. Carlo Regazzoni

References 1. J.G. Proakis, “Digital Communications” (3rd Edition), McGraw- Hill: 1995. • R.C. Dixon, “Spread Spectrum Systems with Commercial Applications” (3rd Edition), Wiley: 1984. • A.J. Viterbi, “CDMA: Principles of Spread Spectrum Communications”: Addison Wesley: 1995. • D. Sarwate, M. B. Pursley, “Correlation Properties of Pseudorandom and Related Sequences”, Proceedings of the IEEE, Vol. 68, No. 5, pp. 593-619, Maggio 1980.

PN in SS Systems: Introduction Schematic shows DS-SS system basic elements; there are two pseudo-noise sequences generators . In the modulator a PN sequence is multiplied by transmitted signal; in demodulator received signal is newly multiplied by a PN sequence replica.

PN in SS Systems: Introduction To demodulate the received signal, the synchronism among the PN sequences is needed A practical method for multiplying transmitted signal and PN sequence is a “module-2” adder. If birepresents i-th bit of the PN sequence and ci is the corresponding bit from codec, the “module-2” sum is: ai = 1 if bi = ci ai = 0 if bi ≠ ci

PN Sequences-characteristics A possible PN sequences generator is shown in figure: bn can be written as: Where C1,…,Crare micro-switch setting coefficients of generator r is the shift register length Symbol probabilities are:

PN Sequences - characteristics is thecoefficient of statistical displacement Where Increasing r, s becomes negligible, and the sequence becomes more and more random. PN sequences, obtained by the previous generator, are periodical with period: L is called also pseudo-noise length and in literature is usually indicated as N. The relation is true when the sequence characteristic Polynomialis primitive and when the initial conditions of the shift register are: In this case PN sequence is called maximum length sequence (m-sequence) NB: r is the length of the shift register and NOT of the sequence.

M-sequences - definition • Be M a given set of PN binary sequences; two sequences; Cross-correlation peak on set M is defined as: • Where is cross-correlation of two sequences, and temporal shift parameter is an integer value, between 0 and N-1. Attention: is different from asynchronous transmission delay.

r N t(r) 3 7 5 5 4 15 9 9 5 31 11 9 6 63 23 17 7 127 41 17 8 255 95 33 9 511 113 33 10 1023 383 65 11 2047 287 65 12 4095 1407 129 M-sequences properties M-sequences, generated by a shift register of length r, have no good correlation properties, indeed, increasing N, cross-correlation peak grows in a huge way. In DS/CDMA systems, the usage of PN sequences set characterized by a cross-correlation value as lower as possible is suggested, in order to decrease the MUI

Gold sequences • Binary sequences • Best ratio between number of available sequences and optimal values of cross-correlation • Based on shift register generation scheme like m-sequences • Generated by a preferential couple of m-sequencesu andvwith the following properties: Where ris the shift register lenght

Gold sequences The Gold sequences generated by u andv (preferential couple of m-sequences ) are composed by N + 2 sequences obtained as: Where is a cyclical shift operator is called Gold set, generated by u andv

Gold sequences - properties All the Gold sequences in set G have the same correlation properties of u andv This means that the Cross-correlation peak of Gold set is the same of u andvcouple A Gold sequences generator is composed by two m-sequences generators with shift register and feedback

Preferential sequences couples Preferential couples of m-sequences with length N = 31 (r = 5) (a) and N = 63 (r = 6)

Preferential sequences couples The numbers in circles represent vectors, in octal notation, which elements are binary coefficients for micro switches setting of a shift register m-sequences generator. Each circle represents a well defined sequence. The couples of circles linked by the segment represent m-sequences preferential couples which can be used to generate Gold sets It can be proved that the correlation properties are optimal for binary sequences whose generators have odd length

Kasami sequences Optimal binary sequences generated by shift register with even length are called Kasami sequences. Kasami sets properties Better cross-correlation properties than Gold sequences More difficult to be generated Extremely reduced dimensions (only available sequences) For these reasons Gold sequences are often used with shift register with even length, in order to serve several users.

Acquisition - introduction In a DS/SS system, PN-code replica generated by receiver must be synchronized with received signal within a little fraction of chip time Tc=1/W, where W is transmitted signal band (for simplicity, we suppose to use a BPSK modulation). De-spreading operation is possible only if two signals are strictly synchronized. Synchronization phase in DS/SS systems is called PN acquisition. When synchronization is reached, matched filter output, sampled every t = Tc, is: i-th bit transmitted value i-th chip of PN sequence value

PN Acquisition DS/SS systems use, generally, very stable hi-frequency digital clocks to reduce transmitter-receiver asynchronism caused by hardware problems. In case of synchronous transmission, initial temporal displacements between transmitted PN signal and receiver replica are due to non perfect knowledge about tx and rx distance. A synchronization header is generally used, at the beginning of data block, containing one or more “1” symbols, spreaded by PN sequence. So the receiver can have a non modulated and delayed PN sequence to compare with its replica

PN Acquisition header header data Received signal (Hypothesis: the received signal is cyclical) t 0 T N=7 PN sequence replica generated by receiver (4 chip delayed) t 0 T

PN acquisition is a totally digital operation, indeed is done on PN signal received from the channel, BPSK demodulated with a coherent system, sampled with , and properly quantized. Fundamental acquisition methods Matched filter correlators Serial search: sliding correlators Sequential search Parallel acquisition Performances evaluation criteria for PN acquisition methods Acquisition mean time Computational complexity False synchronization probability Correct synchronization probability False synchronization probability is the real error probability of this kind of algorithms because a false acquisition produces a wrong demodulation process.

Matchedfiltercorrelator Theoretically optimal (without multiple access interference) Theoretical acquisition time: only one bit time T Constituted by a tapped delay line Every Tc seconds, delay line content is scalar multiplied by PN sequence mirrored replica Result is compared with a suitable threshold, empirically chosen on channel noise Correlator operates convolution between received signal and PN sequence replica Figure 1 acquisition diagram: • matched filter to a 7 chip-PN sequence g(t) • Single chips binary values [c1,c2,…,c7]

Matchedfiltercorrelator If transmitted signal delay is an integer multiplelof chip time Tcmaximum value of convolution product, equal (without noise) to bit energy, is correctly detected in lTc seconds In case of generic delay t is still detected in lTc seconds: Coarse acquisition: Time resolution = chip time Tc Over sampling received signal by a factor b and increasing delay line taps of the same factor, it’s possible to obtain a coarse acquisition with Tc/bseconds resolution Delay line needs a precise shift every 50-100 nsec., so it’s difficult to realize with low cost IC components. matched filter correlator is computationally heavy, even in software development on modern DSP architecture (clock: 720 MHz/1 GHz) Having chip rate Rc and spreading sequence length N, number of elementary operations (sums and multiplications) required is: If N = 127 and Rc= 10Mc/s

Serial search (sliding correlator) It’s the most used algorithm for real applications; theoretical efficiency is not high but the reduced computational complexity allows an easy implementation PN received signal is periodically multiplied by PN sequence replica, cyclically shifted by a delay time whichis incremented every time of a pre-setted value. Product is than integrated for TItime and result is compared with a threshold TH. yl Figure 2: Sliding correlator Sliding correlator operates a “step-by-step” correlation between received signal and generated PN sequence.

Serial search (sliding correlator) When received signal delay is equal to sequence replica pre-set delay (under Tc/bseconds) sliding correlator output correlation ylshould overcome synchronization threshold. Integration time TI can be properly chosen to reduce false and missed synchronization probability. Figure 3: Analytical correlation (a) “step-by-step” correlation (b) calculated by sliding correlator

Serial search (sliding correlator) Serial search is a parametrical method (TI, l). Parameter values influence algorithm performances (false and missed synchronization probability, computational complexity) If: TI = T chip rate = Rc process gain = N number of elementary operations required: Rb= 1/T(bit-rate) Every search step requires at least one bit-header to correlate shifted sequence and received signal. So at least NT seconds are necessary to find the right shift time to impose to PN sequence replica.

PN received signal (delayed) { } 1 2 3 ………………….. r – 1 r b n C C C C C 1 2 3 r - 1 r Close loop switch And open input Switch when Register is full Micro – switch start generation (C = 1 connection) i Rapid sequential search (RASE) PN signals initial delay acquisition method, studied by Ward (1965) as alternative to matched filter correlator (computationally too much complex) and sliding correlator (too much slow) Thought for spreading sequences generated by single shift register devices (m-sequences). It’s applicability to double register devices (Gold, Kasami) is not simple.

Rapid sequential search (RASE) We suppose to receive a delayed binary sequence without any additional noise. Let sequence chip flow into the shift register until it’s full: so we’ll have generator initialization. PN sequence generation starts from the following chip after latest chip loaded into the shift register. RASE effective scheme starts from received and coherent-demodulated signal, sampled with a sample period equal to chip time, quantized on two levels (+1 and -1) by an hard limiter Into the shift register a PN sequence initial phase is loaded, but it’s not effective, but it’s a noisy estimation.

Rapid sequential search (RASE) When register is full, generator loop is closed and the obtained PN sequence is correlated with received PN signal. If correlation overcomes a pre-set threshold, we assume that synchronism is acquired, else another initial phase is loaded. RASE search scheme is quicker than serial search: time required for acquisition is typically reduced by a factor equal to 20. RASE computational complexity is practically the same than serial search. RASE algorithm performances are heavily conditioned by initial phase estimation effectiveness, done demodulating and quantizing signal on two levels, before every de-spreading operation. RASE scheme is vulnerable to jamming noise and multiple access interference. The scheme is so useful in single user ambient an on AWGN channel

Correct and false synchronization probability In case of serial search is possible to obtain analytical expressions for correct synchronization probability (Pdet) and false synchronization probability (Pfals). Correct synchronization probability is given by: Is deviation of coarse-estimated acquisition delay value from effective value where First type Bessel modified function, zero order (defined in numerical form) TH:detection threshold, P: transmitted signal power

Correct and false synchronization probability False synchronization probability is given by: It’s possible to obtain suitable performances, from correct and false synchronization probabilities point of view, imposing the right values of integration time TIand detection threshold TH In a signal recognition system, false alarm probability and correct detection probability are related one another and they are in a trade-off condition: imposing a too low false alarm probability could lead to an unsatisfying correct detection probability

Parallel acquisition Former schemes suffer of some problems, which condition their applicability, like computational complexity (matched filter), very long acquisition time (serial search), restricted performances (RASE). To obviate some of these problems, parallel acquisition strategy is used. It consists in correlating received PN sequence in parallel with a certain number of generated PN sequence cyclically delayed replica. Correlators outputs are combined together by algorithms finalized to minimize false alarm probability. Computational complexity is very high, but robustness and acquisition velocity, even in real conditions, make these algorithms very interesting for future applications.

Tracking: introduction While acquisition is called coarse acquisition too, PN sequence tracking is called also fine acquisition. When coarse acquisition ends, acquiring received signal initial delay with a time resolution equal to Tc/b, tracking phase begins, to keep synchronism between received PN signal and receiver-generated PN sequence. Tracking phase tracks also carrier phase, in case of coherent demodulation. Tracking algorithm must compensate temporization jitter of generated PN sequence compared to ideal synchronism. Jitter values are fractions of chip time. In DS/SS systems two basic schemes are generally used: Delay-Locked-Loop (DLL) Tau-Dither-Loop (TDL)

Delay-Locked-Loop d(t) DLL Tracking Scheme

Delay-Locked-Loop algorithm Correlation between received signal and two versions of generated replica: one delayed of d< Tc/2bseconds and one anticipated of d seconds. These two correlations are band-pass filtered, processed by a square-law envelope detection block and subtracted one another. Subtraction result is filtered by a loop-filter (generally low-pass): it generates a pilot-signal d(t) for VCC. This signal is called composite correlation. VCC generates clock signal for receiver PN sequence generator. When synchronism is not correct, correlators outputs are not equal and VCC is piloted by a non-zero signal which shifts forward or backward generated PN sequence. Trade-off point is obtained when correlators outputs are equally spaced compared to peak value, so sequence generator is exactly synchronized.

Delay-Locked-Loop algorithm Composite correlations

Tau-Dither-Loop TDL system is simpler to implement than DLL because it has only one correlation branch. From tracking precision point of view, performances are a little lower than DLL system.

Tau-Dither-Loop algorithm TDL algorithm starts shifting forward and backward of td< Tc/2bseconds PN sequence replica. Received signal s(t) is multiplied by two versions with different phase of PN sequence replica; only one branch is used and the two signals are so summed. Result signal w(t) is, alternatively, equal to: Two dither signals q1(t)andq2(t) are used; they are obtained by square wave generator q(t)in the way shown in figure: Dither signals TD>> Tc

Tau-Dither-Loop algorithm Dither signals are used to displace phase to PN sequence alternatively with rate fD = 1/TD where TD >> Tc. Using these two signals is possible to write: Square-law envelope detector output is alternatively equal to: It’s possible to write u(t) as:

Tau-Dither-Loop algorithm This expression is similar to composite correlation in DLL systems; if q(t)as carrier signal for u(t): Under multiplicative factors given by q1(t)andq2(t)signals, composite correlation is obtained, like in DLL systems. If loop filter has narrow band compared to fD,q1(t)andq2(t)are mediate and following control signal is obtained: VCC control signal is similar to the ones obtained in DLL scheme, but has half power; this the reason of performances decrement.

Course acquisition and tracking in DS/SS systems