1 / 40

Reconfigurable Radio Design

Reconfigurable Radio Design. 목차. Reconfigurable Architecture Reconfigurable Chip design example Hardware Reconfiguration Introduction to Software RADIO What is the Software RADIO ? Advantage of the Software RADIO Physical Layer of a Radio Modem/Software Defined Radio Modem

lel
Download Presentation

Reconfigurable Radio Design

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Reconfigurable Radio Design

  2. 목차 • Reconfigurable Architecture • Reconfigurable Chip design example • Hardware Reconfiguration • Introduction to Software RADIO • What is the Software RADIO ? • Advantage of the Software RADIO • Physical Layer of a Radio Modem/Software Defined Radio Modem • Software Defined RADIO Project • Example of Development Tool/Configurable Resource • Methodology of Software RADIO • Technical Challenge • Multi Mode and Reconfigurable Terminals • Components • SDR Functional Blocks Description

  3. Semiconductor Revolutions Makimoto’s Wave “Mainstream Silicon Application is switching every 10 Years” software reconfigurable standard instruction streams µproc., memory FPGAs TTL data streams 2007 1967 1987 LSI, MSI 1957 1977 ASICs, accel’s 1997 coarse grain custom structured VLSI design hardware 2nd design crisis 1st design crisis

  4. Broadcasting, Ubiquitous HCI Bio RFID Data Broadcasting Health Telematics Unmanned Driving Robot Next Wave: Endless Possibilities Health, Human, Bio Automotive & Robotics CIS Mobile D-TV Recorder

  5. W W Y Y X X Z Z D C E Why Reconfigurable System? • GPP와 재구성 h/w 를 포함 • 목적: 전력 감축 및 유연성 • 동적인 환경에 따른 Quality of Service를 제공 • 알고리즘 진화에 따른 유연한 구조 • 개발 및 유지 보수해야 하는 플랫폼 감소 Task 1 Task N W A B X C Y D E Z A A B B H H I I J J D D C C E E Reconfigurable Hardware

  6. Energy Efficiency of Reconfigurability • system architecture • communication protocol • O/S and applications • Partitioning of functions between wireless device and services on the network • The mobiles must be flexible enough to accommodate a variety of multimedia services and communication capabilities and adapt to various operating conditions in an (energy) efficient way

  7. S/W configurable platform의 필요성 • Doing More by Doing Less :다양한 표준을 다룰 수 있는 능력이 필요 (AM, FM, GSM, UMTS, digital broadcasting standards, analog and digital television and other data links. • A fully software reconfigurable multi-channel broadband sampling receiver for standards in the 100 MHz band

  8. Gilder’s versus Moore’s law 2x/3-6 months 1M 1000 x WAN/MAN Bandwidth 10,000 Log Growth Processor Performance 100 2x/18 months 97 9 9 01 03 05 07 Greg Papadopoulos, Sun Microsystems

  9. The Ideal Information Companion ONE WLAN for many Standards ONE Information Appliance ONE phone for many Standards ONE PDA for many Standards

  10. Future mobile communications

  11. Heterogeneous wireless networksby Havinga, havinga@cs.utwente.nl There exist many wireless communication networks • frequency bands • requirements on mobility • transmission speed and quality • Examples: • Static: wireless LANs (802.11), Bluetooth, Radio Local Loop • Pedestrian: DECT, PHS • Vehicle: 2/3G cellular, pagers, broadcast TV/radio

  12. Future wireless communication • Two trends will have major impact • Wide proliferation of various wireless access networks • Each with their own preferred type of service • Different quality: data rates, latency, mobility support, .. • Software radio technologies • Programmable radios, Tunable front-ends

  13. Heterogeneous networks, why? • Due to roaming the network changed • e.g. from indoor wireless LAN to outdoor cellular radio • There is coverage from multiple wireless networks •  Possibility to select the most appropriate network for a given application, based on for example • Service classification • User requested QoS parameters • Available network capacity (bandwidth, latency) • Energy consumption needed

  14. Heterogeneous network architecture • Goal design a flexible and open architecture suitable for a variety of different wireless access technologies, for applications with different QoS demands, and different protocols. • Key requirements • Different access technologies (Software Defined Radio) • Heterogeneous network support (use combination of networks) • Mobility management (seamless handover) • Wireless system discovery • Selection of efficient configuration • Simple, scalable, low cost • Energy efficient (always on) • Secure • Compatible/interoperable with existing and future work • Quality of Service support (end-to-end, and local applicable)

  15. Evolution of the Cell Phone • Two co-existent 3-G cellular standards: • Wideband CDMA • Also called UMTS, UTRA, IMT-2000. • Standardized by 3GPP. • Evolution of the GSM backbone. • cdma2000 • Standardized by 3GPP2. • Evolved from IS-95 CDMA (cdmaONE). • Common traits: • 2 GHz PCS band (licensed). • Variable asymmetric data rates for multimedia: • ~144 kbps to vehicles. • ~ 2 Mbps to fixed locations near base station. • Software-defined-radio (SDR) implementation.

  16. LAN: IEEE 802.11 & HIPERLAN MAN: IEEE 802.16 PAN: Bluetooth, IEEE 802.15 Wireless Networking Hierarchy

  17. Application Presentation ISO OSI 7-layer model Session IEEE 802 standards Transport Network Logical Link Control Data Link Medium Access (MAC) Physical (PHY) Physical Standardization of Wireless Networks • Wireless networks are standardized by IEEE. • Under 802 LAN MAN standards committee.

  18. 정의: Software RADIO ? • Ideal한 목표: 채널 변복조 waveform을 Software를 이용. • TX:source encoder, up-conversion of baseband signal to carry frequency • RX:carry phase recovery, symbol or PN code timing recovery • 개방형 구조(Open Architecture) • Radios that are flexible and easily configurable by software • 다중 대역, 다중 모드 • Radios based on virtual components (ie. system-on-a-chip) • 대부분의 기능들이 소프트웨어-programmable, 하드웨어-재구성가능한 프로세서 엘리먼트에서 소프트웨어에 의해 실현 • Configurable-ASIC, DSP 칩, 마이크로프로세서 칩, FPGA, 다른 programmable-DSP

  19. LO1 0.200-MHz BW Low-Pass LO2 5.0-MHz BW 10-MHz Low-Pass FDD Mode 1 LO3 1.25-MHz Ch l 10-MHz Low-Pass LO4 FDD Mode 2 1.25-MHz Ch 2 10-MHz Low-Pass LO5 1.25-MHz Ch 3 10-MHz Low-Pass LO6 1.0-MHz BW Low-Pass LO7 Multi-Mode Info ReceiverConventional Heterodyne GSM 1800 GSM 1800 UMTS UMTS BT / 802.11 BT / 802.11 Legend 2G Cellular 3G Cellular BT / 802.11

  20. Programmable Channel Filter A/D Converter I Q Multi-Mode Info Receiver Software Defined Radio GSM 1800 GSM 1800 UMTS UMTS BT / 802.11 BT / 802.11 LO

  21. Design Issues in SDR • Design of fast and efficient analog-digital converters • Flexibility at the RF front-end • Effective data management procedures, resource allocation • Smooth reconfigurability of the hardware

  22. 효과: Software RADIO • Multiple personalities: 개발 및 유지/보수해야 하는 제품 플랫폼 수 감소 • One platform supports any physical layer, protocol stack • Lower System maintenance & upgrade cost • No hardware replacement or frequent upgrade • Flexibility:체계적으로 스케일될 수 있는 제품구조 • 새로이 진화되어 가고 있는 capacity 수용 • Backward Compatibility • 미래 안정적(Future-Proof) 시스템 개발 • Time-to-Market 최소화

  23. Disadvantages • Higher power consumption than dedicated ASIC approach • More MIPS required • Higher cost (today)

  24. Current SDR users • Military • Consolidating a stack of radios • Bridging between radio networks • Cellular base stations • Avoid “fork lift upgrades” • Multiple standards on same system • New features to market quicker

  25. Emerging SDR uses • Personal communication devices • Cellular / Paging / Wireless LAN(s) • PC based “generic transceiver” • Radio / TV • Emerging unlicensed RF band apps

  26. What is “free/open software?” • “Free as in liberty” • User has access to the source • User is free to modify and is encouraged to contribute the modifications back to the community • A culture of innovation • Various licenses: GNU General Public License (GPL), Mozilla, Artistic License.

  27. How to develop SW radio • Proprietary software for each hardware platform • Standardization of a common hardware platform • Resident compilers and/or real-time standard operating system

  28. Who uses free software? • World wide community of users • Publicly traded companies support or distribute free software: IBM, Red Hat, Mandrake • Linux • Apache web server • Not a fringe activity

  29. What is GNU Radio?Eric Blossom eb@comsec.comBlossom Research +1 831 917 3428798 Lighthouse Ave., Suite 109Monterey, CA 93940 USA • It’s a free software defined radio • A platform for experimenting with digital communications • A platform for signal processing on commodity hardware

  30. Vision • Transmit and receive any signal • Create a practical environment for experimentation & product delivery • Expand the “free software ethic” into what were previously hardware intensive arenas

  31. What H/W is required? • Commodity PC • RF front end (e.g., TV tuner module) • Multi-channel applications / wide B/W: • High speed A/D (20 – 25 Msamples/sec) • Single channel / narrow bandwidth: • SoundBlaster, AC97 codec, etc.

  32. SDR ATSC receiver is practical! • Commodity PC: • Dual processor Athlon 1800+ MP • 512 MB RAM / 120 GB disk • $1300 • Can do: • 6 * 10^9 integer ops / sec • 4 * 10^9 FIR filter taps / sec

  33. ATSC computational requirements • 1080i TSP decode takes about ½ of a single CPU • Naïve equalizer: about 2.5 * 10^9 taps/s • Smart s/w version: about 0.6 * 10^9 taps/s • Viterbi decoder: 10^6 decisions / sec. • Highly amenable to SIMD implementation • Short constraint length

  34. Open source hardware too! • General purpose SDR PCI peripheral: • Tuner module $20 • 25 Msample/sec A/D converter $12 • Spartan II FPGA (100k gates) $18 • Misc analog, SRAM, etc $10 • PWB $10 • Assembly & Test $10 • Total cost to manufacture: $80

  35. GNU Radio resources • Home page (links to source code) http://www.gnu.org/software/gnuradio • Mailing list discuss-gnuradio-request@gnu.org • Archive http://mail.gnu.org/mailman/listinfo/discuss-gnuradio • Open source hardware • http://www.opencores.org/projects/pci • PCI bridges, ethernet, memory controllers, etc.

  36. SDR Evolution • Next Generation: HIPERLAN/2, 3G Cellular • OFDM, CDMA • Code Domain Channelization • Wide Band, Frequency-Shared Medium • Friendly Interference Suppressed Via Orthogonal Chipping Codes with ~30 dB Processing Gain • Software-centric, Can Vary Channel Characteristics with Application and Environment

  37. SDR solution으로 5 단계

  38. Granularité de la reconfigurationSébastien PILLEMENT - ENSSAT/LASTI • Reconfiguration au niveau système • Lx, C62 (décomposition en cluster) • Reconfiguration au niveau fonctionnel • Pleiades, RaPiD, DART(2001) • Reconfiguration au niveau opérateur • Chameleon, Piperench, Morphosys(2000) • Reconfiguration au niveau porte • Napa, GARP, FPGA

  39. The gain size of operationsin Reconfigurable System Architectures • Fine gained operations : Multiply and addition • Medium gained operations : reconfigurable modules • Course gained operations : CPU, host

  40. Design Space of Reconfigurable Architectures Lilian Bossuet LESTER Lab Université de Bretagne Sud Lorient, France RECONFIGURABLE ARCHITECTURES (R-SOC) MULTI GRANULARITY (Heterogeneous) FINE GRAIN (FPGA) COARSE GRAIN (Systolic) Tile-Based Architecture Processor + Coprocessor Island Topology Hierarchical Topology Coarse Grain Coprocessor Fine Grain Coprocessor Mesh Topology Linear Topology Hierarchical Topology • RAW • CHESS • MATRIX • KressArray • Systolix Pulsedsp • Xilinx Virtex • Xilinx Spartran • Atmel AT40K • Lattice ispXPGA • Altera Stratix • Altera Apex • Altera Cyclone • Chameleon • REMARC • Morphosys • Pleiades • Garp • FIPSOC • Triscend E5 • Triscend A7 • Xilinx Virtex-II Pro • Altera Excalibur • Atmel FPSIC • aSoC • E-FPFA • Systolic Ring • RaPiD • PipeRench • DART • FPFA

More Related