XLP nanoWatt Microcontrollers

1. XLP nanoWatt Microcontrollers & Low Power Management

2. Industry Trend • Many types of portable electronics • Metering applications • Medical devices • Power consumption becomes one of the most important concerns for designers

3. Power Consumption • Dynamic • Power used by the switching of the digital logic • Voltage and temperature impact power usage in a small way • Mainly influenced by clock speed • Static • Power consumption when clock is disabled • Transistor leakage currents • Power used by voltage supervisors and other circuits needed to resume normal operation from static mode • Higher impact from voltage and temperature

4. Power Saving Modes • Deep sleep mode • The lowest of the static power modes • Except a few RAM locations, the wake-up circuitry and in some cases a low power oscillator used for RTCC, everything is powered down • Wake-up resets the device, and the firmware has to check special registers to resume normal operation state • Used when long sleep times and very long battery life are required • Accurate timekeeping is possible • No peripherals may run during deep sleep • Typical power consumption is less than 50nA

5. Power Saving Modes • Sleep mode • Standard low power mode that predates nanoWatt technology • Core and most peripheral clocks are shut down • General purpose RAM, registers and Program Counter are preserved • Wake-up times are very short, with little firmware overhead • Used when shorter sleep times and very short wake-up times are required. • ADC (with own RC oscillator) and comparators may be used during sleep • Typical power consumption is between 50-100nA

6. Power Saving Modes • Idle mode • Dynamic reduction mode intended to allow for greater peripheral functionality than the static modes • Core clock is removed while still provided to the peripherals • On some devices it is possible to apply the system clock only to selected peripherals • Idle mode consumes significantly more power than any of the static modes • Useful in cases in which high speed ADC, time-critical communications or DMA transfers are needed • It may significantly reduce power usage when the device is waiting for data transfers, timer overflows and output compare events • Typical current consumption around 25% of normal run mode

7. Power Saving Modes • Doze mode • Dynamic reduction mode allowing full peripheral and some core functionality • System clock is applied to peripherals • A user defined fraction of this clock is still applied to the core • Similar to IDLE mode, but core continues to run at reduced speed • Power consumption up to 75% of normal run mode depending on application

8. Clock Switching • IDLE and DOZE modes allow reduction of core power consumption while peripherals are still clocked at full speed • Clock switching allows reducing the speed of clocks for the entire device • The system clock source may be selected depending upon the situation • Slower crystals or internal RC clocks may be used in code sections that are not time critical • Computation intensive code or time critical sections may conveniently switch back to a high speed clock source

9. Application Examples • Methane gas / smoke sensor • Device enters deep sleep and wakes up every second to sample sensor data • If data over threshold device switches to standard sleep mode and samples sensor data 10 times faster to confirm readings • Alarm is raised after confirmation • Device reverts to normal operation

10. Application Examples • Normal consumption @ 4MIPS is 4mA • Current consumption in sleep mode with 32kHz watch crystal running on TIMER1 is 500nA+100nA static • Acquiring 8 ADC samples and deciding if values over threshold takes less than 500us • Duty cycle estimated to 0.05% (500us out of 1s) • Average current consumption is 4000uA*0.05%+0.6uA*99.95%=2.5997uA • Excluding leakage, device may run 22 years using a pair of 500mAh AAA batteries

11. Thank you!