Zaher Andrawis Ashraf khoury Intermediate Report Supervisor Hain Brodny Summer 2001

1. Wireless PC-Peripherals CommunicationviaBlue Tooth(D0130 project) Zaher Andrawis Ashraf khoury Intermediate Report Supervisor Hain Brodny Summer 2001

2. Project Purpose Wireless communication between PC and its peripherals BlueTooth

3. Specifications • Communication between PC and a peripheral device through the McBSP serial port of the DSP • Translating the PS/2 protocol from the PC or Device side to the McBSP. The DSP transfers transparently the received bytes Implementation: FPGA board with PS/2 connectors and a connection to DSP DSP program to mirror the data

4. Specifications (cont) • Board requirements: • FPGA FLEX10K100 Board • EPC2 configuration chip and Jtag Interface • 4 PS/2 Connectors • An interface to 5402 DSP • Debugging pins • Jumpers to enable “McBSP” In/Out “contact” to work-around the DSP! • Power Supply • We aim to check the system “due diligence”, thus voltage and power adjustment of the final “tape-out” less concerns us

5. Specifications (cont) • FPGA implementation should include 10KHZ PS/2 protocol, and McBSP protocol in the DSP frquency we’ll configure in the future. • Testing will be done by defining the appropriate test-benches in Renoir, And by DSP software… • Equipment requirements: • PC (with LPT + 2 serial ports!) • PS/2 device (keyboard + mouse) • DSK (of DSP 5402) • ByteBlaster parallel port • Digital “scope” for debugging • Jumpers • Vcc/GND supplier (Vcc=5 v !)

6. Background • Input/Output: • PS/2 : 10KHZ – Start/Data(8)/Stop/Parity bits… (http://panda.cs.ndsu.nodak.edu/~achapwes/PICmicro/PS2/ps2.htm) • PC and Device cannot collide in transmitting/receiving… BUT : Using the wireless broadcast might cause such a collision  The FPGA implementation handles that!

7. McBSP of DSP: Typically 12.5 MHz The exact frequency is determined by the clock generating method, configured using the McBSP control registers.

8. PS/2 lines McBSP lines Controller DeviceSide PC DeviceSide=1 DeviceSide=0 Mouse PS/2 Interface McBSP Interface DSP DeviceSide=1 DeviceSide=0 Keyboard Functional Blocks

9. Hardware – The whole System

10. Hardware – FPGA Board FPGA Board PS/2 connector PS/2 connector FPGA for PC for Devices PS/2 connector PS/2 connector Jumpers for McBSP “contact” DSP Interface

11. Pin-to-Pin Proposal Map

12. FPGA of ALTERA • FLEX10K100: • Supports Peripheral connection • 10 MHz clock • Relevant Configuration Device is EPC2, or 2 EPC1s ! For the moment we’ve designed the system for one EPC2. • Dev’ Software: Renoir 2000 ModelSem+Leonardo, MaxPlusII

13. Translation Blocks in a nutshell Compiles Hierarchaly with 0 Errors! FR FX CLKR CLKX DR DX

14. Main Controller • 2 FSMs for controlling PS/2 and McBSP units, and samples their status • Handles Collision (possible !!)

15. Reminder Interface – Example: PS/2

16. Reminder Interface – Example: PS/2 (cont)

17. Software • In part A we are requested to “work-around” the BT: • Translate PS/2 to McBSP and vise versa • DSP mirros the input to the output: • We assume the McBSP API is ready… • While(TRUE){ • a = getchar(A1) • putchar(A2) • }

18. Software / Testing • The above program tests the PS/2-to-McBSP-McBSP-to-PS/2 ! • Alternative testing for the McBSP only is : • OnceInAWhile(){ • putchar(a,A2); • a’=getchar(A1); • “Shout()” if a’!=a • }

19. Schedule • 30.8 (this week)– Finish pin-to- pin scheme and send board for start-up… • 6.9 (next week)– Finish test benches, with successfully working Renoir modules • 13.9 –Controlling/understanding DSP software and building the required tests. • 13.10 – Testing the ready (hopefully!) FPGA board: We should type a char in the keyboard, or move the mouse, and see the effect on the connected PC, when data goes through our FPGA + DSP !