1 / 20

Petros Oikonomakos Bashir M. Al-Hashimi Mark Zwolinski

Electronics and Computer Science. Versatile High-Level Synthesis of Self-Checking Datapaths Using an On-line Testability Metric. Petros Oikonomakos Bashir M. Al-Hashimi Mark Zwolinski. Electronic Systems Design Group. University of Southampton, UK. Motivation.

lew
Download Presentation

Petros Oikonomakos Bashir M. Al-Hashimi Mark Zwolinski

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Electronics and Computer Science Versatile High-Level Synthesis of Self-Checking Datapaths Using an On-line Testability Metric Petros Oikonomakos Bashir M. Al-Hashimi Mark Zwolinski Electronic Systems Design Group University of Southampton, UK

  2. Motivation • On-line testability and Self-checking design • High reliability requirements • Hostile environments • …but significant hardware and / or performance penalties • High-level synthesis • Fast time-to-market • Fast and efficient design space exploration • Specification-driven optimisation at the highest level of abstraction High-level synthesis for on-line testability

  3. Outline • Introduction • Physical and Algorithmic Duplication and Inversion-based Self-checking Design • High-level Synthesis Background • Implementation : Transforms, Metric, Algorithm • Synthesis and Simulation Results • Conclusion

  4. Introduction • Self-checking design at the RTL : typical in industry • Self-checking design before high-level synthesis • Self-checking design after high-level synthesis • Our approach : self-checking design within high-level synthesis!!!

  5. Duplication Inversion CUT CUT* CUT INV(CUT) Comparator Comparator Self-checking design • INV(CUT) : functional “inverse” of CUT • Fault secure for arithmetic modules • CUT* : functionally equivalent to CUT • Fault secure by nature

  6. Self-checking design Physical vs. Algorithmic Duplication • Physical Duplication • physically duplicated operators • over 100% hardware overhead • Algorithmic Duplication • behaviourally duplicated operations • possible significant hardware savings

  7. Self-checking design Physical vs. Algorithmic Inversion • Physical Inversion • no advantage over duplication • Algorithmic Inversion • allied to algorithmic duplication • possibly more hardware savings than algorithmic duplication

  8. High-level synthesis background • behavioural HDL code • initial design  iterative refinement (optimisation loop) • drivenby a cost function • based on available (scheduling, allocation) transformations • controlled by an algorithm

  9. transformation valid? perform transform? perform another transform? High-level synthesis optimisation loop transform and data selection validity check y cost estimation n n y execution n y end

  10. Implementation - Transforms within the Multiple Objective Optimisation in Data and control path Synthesis (MOODS) High-level Synthesis Suite N #2C2 #1C1 Initial state

  11. Implementation - Transforms within the Multiple Objective Optimisation in Data and control path Synthesis (MOODS) High-level Synthesis Suite N #2C2 #1C1 N+1 C3#2´ N+2 != Applying an on-line test resource insertion transform

  12. Implementation - Transforms within the Multiple Objective Optimisation in Data and control path Synthesis (MOODS) High-level Synthesis Suite N #2C2 #1C1 C1#2´ N+1 != Optimising for area

  13. Implementation - Transforms within the Multiple Objective Optimisation in Data and control path Synthesis (MOODS) High-level Synthesis Suite N #2C2 #1C1 N+1 C3#2´ N+2 != Applying an on-line test resource insertion transform

  14. #1 #2´ #2 Implementation - Transforms within the Multiple Objective Optimisation in Data and control path Synthesis (MOODS) High-level Synthesis Suite N C1 C2 C3 != Optimising for speed

  15. Implementation - Metric • Overall cost function Cost=c1α1+c2α2+...+cnαn Enhancing the cost function to includeon-line testability • αn+1=Ton-line=σ1P1+σ2P2(1-P1)+σ3[log(L-1)+σ4] P1 : % of on-line testable operations P2 : % average idle time availability L: average error latency σ1,σ2,σ3,σ4: constants

  16. Implementation - Algorithm • Simulated annealing • Choice between duplication and inversion based on clock period requirements • Area- and / or delay-oriented heuristics …more on MOODS : reference [7]

  17. testability % testability % testability % delay (ns) delay (ns) area (slices) area (slices) area (slices) delay (μs) tseng diffeq qrs Experimental results z z z y y y x x x • 3-dimensional design space, on-line testability on the z-axis • x-y plane : untestable designs • design space exploration

  18. Experimental results The significance of design space exploration Optimisation Settings Results Area (slices) Max Freq. Cycles Testability Area, delay 146 48MHz 7 - Area, delay, testability 165 (+13%) 4MHz 7 Inv (100%) Delay, testability172 (+17.8%) 38MHz 7 Dupl (100%) (tseng benchmark) • optimum design depends on clock speed requirements • the tool provides options  the designer makes decisions!

  19. Experimental results Simulation • transparent fault injection and simulation, at the RTL • independent experiments, a single fault at a time • random faults, random inputs Results (Tseng benchmark)

  20. Conclusion • Integral, cost function-driven on-line test synthesis framework • Properties and contributions: • Versatility : hardware- or time-redundancy according to designer’s requirements • Fully automatic insertion of self-checking resources • Quantification of on-line testability • Utilisation of the inversion testing idea

More Related