Optical BusES

1. KebinaManandhar OpticalBusES

2. Overview • Properties • Mesh sort algorithm • A paper – Mutual exclusion on optical buses

3. Properties • Unidirectional • Predictable propagation delay Propagation Delay(TD) αDistance(D)

4. Properties (Cont.) • D = Distance between two processors • b = number of bits in the message • v = speed of light in the waveguide • w = width of light pulse • D > bvw (to avoid overlapping of data) D P1 P2 Pn-1 ……….

5. Properties (Cont.) • Processors place their data in the bus at pre-specified time separated by regular interval Example: • Pi and Pi+1di and di+1 • First bit of Pi will reach Pi+1 after all its bits depart • Ensures no collision • Bus cycle TB(L)=L/v, L=(n-1)D and TB(L)=O(1)

6. When will Pj read di from bus? Receiver Pj knows identity of the sender Pi • Processors will put a datum on the bus only at the beginning of a bus cycle. • The time Pj should wait: wait(i, j) = (j – i) TD • The transmission of difrom Pi to Pjis completed within one bus cycle. • The same message can be read by different processors, during the same bus cycle. • However, at the same time, one processor can only read one message

7. Example

8. Waiting function (cont.) Sender knows the identity of the receiver. • The sender Piwrites its messagedi, destined to Pj on the bus at time ((n-1)-(j-i)) TD. • All processors read the bus simultaneously at the end of the bus cycle • The transmission of difrom PitoPjtakes one bus cycle

9. Example

10. Two way communication

11. Example (broadcasting)

12. Example (permutation)

13. Example (Distribution) d0 d1 d2 d0 d1 d2 P0 P0 P0 P1 P1 P1 P2 P2 P2 P3 P3 P3 P4 P4 P4 d3 d4 d3 d4 d0 d4

14. Mesh with optical buses Optical signal weaken rapidly with distance The time taken by a message to travel from one end of the bus to other, grows considerably with length

15. Example

16. By Krishna M. Kavi and Dinesh P. Mehta Mutual Exclusion on optical buses

17. Mutual Exclusion • Processors in shared memory share resources • Should have following properties • Freedom from deadlocks • Freedom from starvation • Fairness

18. Assumptions • Bus cycle: Time to travel one segment of pipelined bus • Computation during a bus cycle: Communication and computation in one bus cycle • alternating cycle of communication and computation • Bus contention: Buses are designed to avoid collisions • Permits asynchronous and simultaneous requests • Processors are equipped with transmitters and receivers to avoid contention

19. Architectures • Folded one-dimensional bus • Messages can simultaneously co-exist • dij = 2n -1- i – j time to travel from Pi to Pj • Pi-1 transmit at t-1 then Pi cannot transmit at t

20. Mutual Exclusion Algorithms • Contention phase: • processors compete for same resource • Turn = index of processor • Access phase: • Processors access resource based on their turn • Broadcast message after accessing the resource so that others can access the same resource

21. Mutual Exclusion Algorithms (cont.) • Pi requests resource Ri by broadcasting a message • Pj puts a hold on any future request for Ri until it is released by Pi • Problem arises if Pj puts request for Ri before Pj receives Pi’s request

22. Window Based Algorithm • Diameter D = longest delay or time taken for a message to travel D = maxij,i≠jdij • Window of vulnerability = 2D

23. Rules / Assumptions • Resource request : message containing id of requester(Pi) and resource requested (Ri) • Pi makes another request only after window of vulnerability has elapsed • If Pj receives a request from Pi for Ri, Pj will delay its request for Ri until its vulnerability window expires • When several processor’s requests overlap, priorities are used Lowest numbered processor having highest priority

24. Send_Request function • Processor i needs to request resource r at time t • t>earliest[r] should be true • Array my_turn[r] = order in which processors will access resource r • Array next_turn[r] counts processors assigned turns to access resource r

26. Receive_Request function • Processor Pi receives request at time t • r = resource processor Pi requested at time ti • r=ti= null if Pi has no outstanding request at time t • t <= ti+2D if Pi has outstanding request

28. Example • n=10 • Requests for resource R • P0,P2 at t=0 • P7 at t = 8 • P1 at t = 11 • P9 at t = 16 • P8 at t = 22

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30. Problem • Unfair • Biased against low priority processors

31. Time Stamp Based Algorithm • Pi receives a request from Pj at time t • Pj’s message originiated at time t-dji • If this time is less than ti (time at which Pi produced its message), then Pj gets access to the resource before Pi

32. Time Stamp Based Algorithm

34. Performance Analysis • Synchronization Delay (SD) • Time taken to acquire a lock after another processor • For P0, SD = 2n-2 • For Pi, SD = 2n-i-1; i≠0 • Throughput (TH) • Number of processors that can acquire lock per unit time • TH = 1/(SD+E), E=time spend in critical section

35. Performance Analysis (Cont.) • Response Time (RT) • Time interval between request and release of a lock • Best case: lock is not held and not requested during window of vulnerability by any other processor RT= 2D+E • Worst case: All processors request the resource at the same time, Pn-1 must wait for remaining n-1 processors to acquire lock.

36. References • ‘Mutual Exclusion on Optical Buses’, Krishna M Kavi, Dinesh P Mehta, 2002 • ‘Parallel Computation, Model and Methods’, Prentice Hall, 1997

37. Thank you!! Questions?