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A New Input Switching Scheme for a Capacitive Microgravity Accelerometer

A New Input Switching Scheme for a Capacitive Microgravity Accelerometer. Proposed by: Babak Vakili Amini Advisor: Farrokh Ayazi Georgia Institute of Technology School of Electrical & Computer Eng. Atlanta, GA, USA. Evolution of Integrated  AXLs SOI Micro- Accelerometers

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A New Input Switching Scheme for a Capacitive Microgravity Accelerometer

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  1. A New Input Switching Scheme for a Capacitive Microgravity Accelerometer Proposed by: Babak Vakili Amini Advisor: Farrokh Ayazi Georgia Institute of Technology School of Electrical & Computer Eng. Atlanta, GA, USA

  2. Evolution of Integrated AXLs SOI Micro-Accelerometers Interface Circuit Architecture Preliminary Test Results Conclusions and Future Work Outline 1

  3. Evolution of Integrated AXLs Analog Devices ADXLs ~1.5mm 1st generation ADXL50 (1991) Poly-Si surface micromachined 4th generation ADXL40 (2004) SOIMEMS bulk micromachined M.W. Judy, “Evolution of Integrated Inertial MEMS Technology,” Tech. Dig. Solid-State Sensors, Actuators, and Microsystems Workshop, Hilton Head, pp. 27-32, June 2004 2

  4. Motivation • Bulk Micro-Accelerometer • Bulk micro-accelerometers will dominate. • Resolution will be limited by electronics. • Large capacitances (1-10pF) are inevitable. • Needs • Eliminate large area reference capacitors • Eliminate switching of the proof mass • Improve mechanical noise per unit area • Improve electronics noise 3

  5. This Work • Interface IC • Reference-capacitor-less switching scheme • Elimination of proof mass switching • Reduction of charge injection • Mechanical Sensor • Thick SOI capacitive accelerometers • Stictionless CMOS-compatible process • Micro-g mechanical noise floor 4

  6. Evolution of Integrated AXLs SOI Micro-Accelerometers Interface Circuit Architecture Preliminary Test Results Conclusions and Future Work Outline 5

  7. Oxide Design Considerations • 50m thick solid proof mass to obtain g/Hz resolution • Large electrode area, small foot print and high yield 6

  8. Measured Specifications IF BW=2 Hz fRES=1.6 kHz Bandwidth: fRES(ANSYS)=1.5kHz fRES(measured)=1.6kHz 7

  9. Evolution of Integrated AXLs SOI Micro-Accelerometers Interface Circuit Architecture Preliminary Test Results Conclusions and Future Work Outline 8

  10. Previous Design • On-chip reference capacitors • Clocked proof mass 9

  11. Previous Interface IC Traditional Capacitive MEMS-IC Interface Programmable SC Charge Amplifier 10

  12. New SOI Micro-Accelerometers • Fully differential & symmetric sense capacitors • Constant bias of the proof mass (no switching) 11

  13. Proposed Interface IC Proof mass Dual Buffer Sample/Hold • Fully differential scheme • Parasitic insensitive • Programmable gain • 2.5V 0.25m 2P5M CMOS 12

  14. Evolution of Integrated AXLs SOI Micro-Accelerometers Interface Circuit Architecture Preliminary Test Results Conclusions and Future Work Outline 13

  15. Differential Sampled Output Gain=0.45V/g Before S&H for 0.5g (peak), 3Hz acceleration 14

  16. Differential S&H Output Gain=0.45V/g After S&H for 0.5g (peak), 3Hz acceleration 15

  17. Output Noise Spectrum Input Signal • 10dB reduction w/ 0.5pF CDS Noise floor –87dBm • 16dB reduction w/ 2pF CDS Noise floor –94dBm 16

  18. Measured Specifications Sensor Specifications IC Specifications 17

  19. Conclusions and Future Work • Reference-Capacitor-Less Interface IC • Elimination of on-chip reference capacitors • Elimination of proof mass switching • Reduction of charge injection • Micro-g electrical noise floor • Work Need to Be Done • 2nd order  modulator for the closed-loop operation of SOI microaccelerometers 18

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