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Flight Software Status

Flight Software Status. JSC 13 January 2007 Andrei Kounine / MIT. DAQ Architecture. xDR, JINF, JINJ data acquisition slow control USCM slow control JMDC data acquisition slow control avionics interface. Persistent storage for programs. Two types of memory to store SW: PROM memory

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Flight Software Status

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  1. Flight Software Status JSC 13 January 2007 Andrei Kounine / MIT Flight Software Status

  2. DAQ Architecture xDR, JINF, JINJ • data acquisition • slow control USCM • slow control JMDC • data acquisition • slow control • avionics interface Flight Software Status

  3. Persistent storage for programs Two types of memory to store SW: • PROM memory • Programmed once during production • Not changeable during flight • Contains “ROM Monitor” program • SW must meet specific time deadlines • FLASH Memory • Can be rewritten any time • Contains “DAQ” programs • Contains Data Sets Flight Software Status

  4. xDR, JINF, JINJ Software Flight Software Status

  5. xDR, JINF, JINJ software responsibilities • Framework – A.Kounine • LV1 Trigger – A.Kounine, C.H.Lin • Tracker – D.Haas, C.Zurbach • TRD – A.Sabellek • RICH – G.Martinez • ECAL – S.DiFalco • TOF & ACC – A.Kounine Flight Software Status

  6. Status of xDR, JINF, JINJ software • ROM Monitor • 4 types for 310 nodes (xDR, LV1/SDR, JINF, JINJ) • Only minor changes since 2003 • Tested in the lab and in the beam tests • Initial release for FM production on 15.09.2005 • Final ROM monitor version frozen on 5.02.2006 • DAQ programs • T,U,R,E,LV1 – passed intensive tests, fine tuning; • JINF,JINJ – passed intensive tests, fine tuning; • S – tests in progress, modifications of HW and FW, development of TOF-specific data processing. Flight Software Status

  7. Problems observed during tests • Functionality of ACTEL chips TDR FM production – 2 ACTELs have broken functions (AMSwire RX, sequencer) despite correct checksum. Detailed functional tests during production needed to spot this type of problems. • Corrupted sector in FLASH memory One JINFv2 QM has FLASH memory with a sector (1 of 11) that can not be erased. If discovered early – replace, otherwise live with it. Flight Software Status

  8. Status of S-crate software • ROM Monitor frozen: • Identical to that of JLV1, tested on SDR2 • All basic functions (FLASH operations, AMSWire communication, …) are tested. • DAQ program development: • LeCroy bus functionality verified; • Sequencer – ongoing tests; • TOF control commands – under tests; • Data collection from SFEC, SFET boards – under tests; • Data collection from SFEA board – not yet started, pending availability of the board. Flight Software Status

  9. Status of S-crate software • S-crate comprises: • 1 SDR2 board • 4 SFET2 boards; • 1 SPT2 board (with 2 SFEC boards connected); • 1 SFEA2 board. • Test setup consist of: • ½ of SDR2 board; • ½ of SFET2 board with limited functionality; • ½ of SPT2 board with 1 SFEC board connected. • Software development goes along with FW development and HW verification. Flight Software Status

  10. Status of the xDR, JINx Software • V6205 released on 5.02.2006 ROM Monitor – frozen, used in JLV1, TDR, JINJ FM (this corresponds to about 60% of DSP-based FMs) • V6B18 – current DAQ development version • SDR code – under development (HW, FW, SW); • Fine tuning of DAQ programs. • TOF electronics – design frozen, verification in progress. • TOF electronics – qualification by fall 2007 Flight Software Status

  11. JMDC Software Flight Software Status

  12. Status of the JROM Flight software • V661E – programmed 4 FM JSBC (RHPROM): JSBS FM/FS production finished mid-August 2006. 6 SW bugs identified, MUST be corrected for flight (ECO will be issued). 1 corrupted RHPROM (JMDC2, addr 0xFFF100D2). (NCR will be issued). • V6C01 – version with the known bugs fixed. In-depth tests are still being conducted. Used in ESS tests along with v661E Flight Software Status

  13. Problems observed during tests • Reliability of RHPROM chips • JCBS (95009F) – 1 bit was wrongly programmed; • JIM-CAN (94004F) – bit flipped during thermal test; • JSBC (95008F) – abnormal behavior at -20oC, may be related to RHPROM, to be verified. • Programming procedure must be observed • Baking at 200oC for 64hours – was not performed; • Burn-in at 150oC for 64hours – was not performed; • Post burn-in verification to be performed. Flight Software Status

  14. J-crate schedule • Dec 2006 – ESS acceptance tests of the 1st J-crate, to be completed in January 2007. • January-February 2007 – TVT acceptance of the 1st J-crate. • June 2007 – replace 4 JBU boards by JBUX. Real deadline for replacing RHPROMs. Assembly of the 2nd J-crate. • Summer and fall 2007 – acceptance tests for 2nd J-crate, re-qualification of the 1st J-crate. Flight Software Status

  15. Status of the JROM Flight software • 28 RHPROMs available for programming: 24 needed for programming of 6 FM/FS JSBC. 2(4) FM/FS JSBC will be equipped with Boot FLASH. • Further tests: Conduct J-crate ESS with v661E, gain experience. SW backdoor for last-minute changes in ROM Mon (for ESS tests v6C01 is actually used). • Replace RHPROMs when JBUX available. Time frame – April-May 2007. Flight Software Status

  16. Conclusions • xDR, JINF, JINJ software. • ROM Monitor is frozen, used for JLV1, TDR, JINJ FM; • S-crate HW/FW, is on the critical path. • JMDC software. • ROM Monitor V661E used for FM production; • Prudent iteration on ROM Monitor needed; • JOS is frozen, no modifications are foreseen; • JAP is under tests and development. Flight Software Status

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